From patchwork Mon Apr 22 16:49:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10911277 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B08AD13B5 for ; Mon, 22 Apr 2019 16:51:47 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A4B252856E for ; Mon, 22 Apr 2019 16:51:47 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 98DC9285E0; Mon, 22 Apr 2019 16:51:47 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 7AB7428514 for ; Mon, 22 Apr 2019 16:51:46 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hIc8s-0004wZ-Uw; Mon, 22 Apr 2019 16:50:06 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hIc8r-0004pv-V7 for xen-devel@lists.xenproject.org; Mon, 22 Apr 2019 16:50:05 +0000 X-Inumbo-ID: ad9151e3-651e-11e9-92d7-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id ad9151e3-651e-11e9-92d7-bc764e045a96; Mon, 22 Apr 2019 16:50:04 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 93589374; Mon, 22 Apr 2019 09:50:04 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 835A63F557; Mon, 22 Apr 2019 09:50:03 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Mon, 22 Apr 2019 17:49:27 +0100 Message-Id: <20190422164937.21350-11-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190422164937.21350-1-julien.grall@arm.com> References: <20190422164937.21350-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH 10/20] xen/arm32: head: Correctly report the HW CPU ID X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr_Tyshchenko@epam.com, Julien Grall , sstabellini@kernel.org, Andrii_Anisov@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP There are no reason to consider the HW CPU ID will be 0 when the processor is part of a uniprocessor system. At best, this will result to conflicting output as the rest of Xen use the value directly read from MPIDR. So remove the zeroing and logic to check if the CPU is part of a uniprocessor system. Signed-off-by: Julien Grall Reviewed-by: Andrii Anisov --- xen/arch/arm/arm32/head.S | 8 -------- 1 file changed, 8 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 9f40face98..d42a13556c 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -124,16 +124,8 @@ GLOBAL(init_secondary) mov r12, #1 /* r12 := is_secondary_cpu */ common_start: - mov r7, #0 /* r7 := CPU ID. Initialy zero until we - * find that multiprocessor extensions are - * present and the system is SMP */ mrc CP32(r1, MPIDR) - tst r1, #MPIDR_SMP /* Multiprocessor extension supported? */ - beq 1f - tst r1, #MPIDR_UP /* Uniprocessor system? */ - bne 1f bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */ -1: /* Non-boot CPUs wait here until __cpu_up is ready for them */ teq r12, #0