diff mbox series

[11/20] xen/arm32: head: Don't set MAIR0 and MAIR1

Message ID 20190422164937.21350-12-julien.grall@arm.com (mailing list archive)
State Superseded
Headers show
Series xen/arm: Clean-up & fixes in boot/mm code | expand

Commit Message

Julien Grall April 22, 2019, 4:49 p.m. UTC 
The co-processor registers MAIR0 and MAIR1 are managed by EL1. So there
are no need to initialize them during Xen boot.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/arm32/head.S | 2 --
 1 file changed, 2 deletions(-)

Comments

Andrii Anisov May 3, 2019, 3:57 p.m. UTC | #1 
Hello Julien,

On 22.04.19 19:49, Julien Grall wrote:
> The co-processor registers MAIR0 and MAIR1 are managed by EL1. So there
> are no need to initialize them during Xen boot.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>


Reviewed-by: Andrii Anisov <andrii_anisov@epam.com>
diff mbox series

Patch

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index d42a13556c..3448817aab 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -212,8 +212,6 @@  cpu_init_done:
         /* Set up memory attribute type tables */
         ldr   r0, =MAIR0VAL
         ldr   r1, =MAIR1VAL
-        mcr   CP32(r0, MAIR0)
-        mcr   CP32(r1, MAIR1)
         mcr   CP32(r0, HMAIR0)
         mcr   CP32(r1, HMAIR1)