From patchwork Tue May 14 12:21:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 10942843 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3E7F417EE for ; Tue, 14 May 2019 12:23:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2F966286A4 for ; Tue, 14 May 2019 12:23:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 24100286A7; Tue, 14 May 2019 12:23:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id A841C286A8 for ; Tue, 14 May 2019 12:23:14 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hQWRO-00089L-C5; Tue, 14 May 2019 12:21:54 +0000 Received: from us1-rack-dfw2.inumbo.com ([104.130.134.6]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1hQWRN-00088h-7M for xen-devel@lists.xenproject.org; Tue, 14 May 2019 12:21:53 +0000 X-Inumbo-ID: da83c45e-7642-11e9-8980-bc764e045a96 Received: from foss.arm.com (unknown [217.140.101.70]) by us1-rack-dfw2.inumbo.com (Halon) with ESMTP id da83c45e-7642-11e9-8980-bc764e045a96; Tue, 14 May 2019 12:21:51 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 98A37341; Tue, 14 May 2019 05:21:51 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.196.50]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 890773F71E; Tue, 14 May 2019 05:21:50 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xenproject.org Date: Tue, 14 May 2019 13:21:14 +0100 Message-Id: <20190514122136.28215-6-julien.grall@arm.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190514122136.28215-1-julien.grall@arm.com> References: <20190514122136.28215-1-julien.grall@arm.com> Subject: [Xen-devel] [PATCH MM-PART2 v2 03/19] xen/arm: processor: Use BIT(.., UL) instead of _AC(1, U) in SCTLR_ defines X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: Oleksandr_Tyshchenko@epam.com, Julien Grall , Stefano Stabellini , Andrii_Anisov@epam.com MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP Use the pattern BIT(..., UL) to make the code more readable. Note that unsigned long is used instead of unsigned because SCTLR is technically 32-bit on Arm32 and 64-bit on Arm64. Signed-off-by: Julien Grall --- Changes in v2: - Rework the patch to use BIT(..., UL) instead of _BITUL(...). --- xen/include/asm-arm/processor.h | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index f3b68185eb..bbcba061ca 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -120,20 +120,20 @@ /* Bits specific to SCTLR_EL1 for Arm32 */ -#define SCTLR_A32_EL1_V (_AC(1,U)<<13) +#define SCTLR_A32_EL1_V BIT(13, UL) /* Common bits for SCTLR_ELx for Arm32 */ -#define SCTLR_A32_ELx_TE (_AC(1,U)<<30) -#define SCTLR_A32_ELx_FI (_AC(1,U)<<21) +#define SCTLR_A32_ELx_TE BIT(30, UL) +#define SCTLR_A32_ELx_FI BIT(21, UL) /* Common bits for SCTLR_ELx on all architectures */ -#define SCTLR_Axx_ELx_EE (_AC(1,U)<<25) -#define SCTLR_Axx_ELx_WXN (_AC(1,U)<<19) -#define SCTLR_Axx_ELx_I (_AC(1,U)<<12) -#define SCTLR_Axx_ELx_C (_AC(1,U)<<2) -#define SCTLR_Axx_ELx_A (_AC(1,U)<<1) -#define SCTLR_Axx_ELx_M (_AC(1,U)<<0) +#define SCTLR_Axx_ELx_EE BIT(25, UL) +#define SCTLR_Axx_ELx_WXN BIT(19, UL) +#define SCTLR_Axx_ELx_I BIT(12, UL) +#define SCTLR_Axx_ELx_C BIT(2, UL) +#define SCTLR_Axx_ELx_A BIT(1, UL) +#define SCTLR_Axx_ELx_M BIT(0, UL) #define HSCTLR_BASE _AC(0x30c51878,U)