From patchwork Thu Jan 2 21:13:55 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pasha Tatashin X-Patchwork-Id: 11316049 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8F2FB930 for ; Thu, 2 Jan 2020 21:15:21 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6B43321582 for ; Thu, 2 Jan 2020 21:15:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (2048-bit key) header.d=soleen.com header.i=@soleen.com header.b="OrYEDSt9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6B43321582 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=soleen.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1in7nS-0001Ay-P5; Thu, 02 Jan 2020 21:14:22 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.89) (envelope-from ) id 1in7nR-0001Ae-NB for xen-devel@lists.xenproject.org; Thu, 02 Jan 2020 21:14:21 +0000 X-Inumbo-ID: d02843ce-2da4-11ea-b6f1-bc764e2007e4 Received: from mail-qv1-xf43.google.com (unknown [2607:f8b0:4864:20::f43]) by us1-rack-iad1.inumbo.com (Halon) with ESMTPS id d02843ce-2da4-11ea-b6f1-bc764e2007e4; Thu, 02 Jan 2020 21:14:07 +0000 (UTC) Received: by mail-qv1-xf43.google.com with SMTP id f16so15499077qvi.4 for ; Thu, 02 Jan 2020 13:14:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=soleen.com; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=DSu775/r8r2Tkmehdmqp98rpWAvc+FGMQ75JxAM97Qk=; b=OrYEDSt9+5eRFaPFkWqZfdDPoX8oBOMKWIx5RN37UsN5RKyL+QI/bFCjKt/9bYqTwb cGAKt4VFDzZWzGI8HGRlHNOOm51h9iKkmHQLaQ+ZGeK0srrJ9d1XGb/S8Iur7VBkcQxI MyCi32PMGR+VJwl5o/HPoHX+4mEo6v21yZPg0Yozv/0f4RoeG/gKdK1GTUm1zsmp1IzG Oij+HSsTiiV/BYAwNB6O6q5MrhW0WnE1lSlIG0HBRmZTt/xuarTCeW5+SFsx5RxgQYpN EROSSyM7QLIWulE8Z34ge0x3MEAOAjIJngvTC8mpdtwXVyRogdKoqDe3A2BMBnsEiOqS bEOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=DSu775/r8r2Tkmehdmqp98rpWAvc+FGMQ75JxAM97Qk=; b=G+rjT3N01IKCMbCzEehj1ksylW4JdpwJ6XB+E3whKApRLs1Gat7G94zNtTvk2yzJMS WOhqPmXyfKEFgV4pypbaW34E8GlmBjHv8p28PFT2j9aqOA9mfyctRP622rWIf+4Vqokq zFLpsRf6Vil8AD6y5aNLJs3pCUhHElImJ7pBobBpWgP7El0TyiNqGlF+hEtN/4oBA/pT SVuQzGr5d9twVON5h7vAs/IO8X0EGmW/g3HYJu5iLMY+odLMIboyiWFvrtH3SHIyYCqF W4cL18n5gzvjBvb0h+IsWqfeyvTWIUVKVMLLJn/mhTkL7Qp5y1Jvq8YSnd8XWcsiiujr BZlA== X-Gm-Message-State: APjAAAX4gY5xIP6lELEqWmqzsjLnKc78slt6JbL5MwTSJ6BrKQ9KpAkm c2ZG+N0zukTl3EZNeoiK6/ZFOmU8wXU= X-Google-Smtp-Source: APXvYqwxDCRcHnwDHHB6fG/rrbyOkgBibEXX240FPR8z4mLL8J0UkjGCVHk+Ow7I/qMA/mj7d2MLrg== X-Received: by 2002:a05:6214:146e:: with SMTP id c14mr65985808qvy.82.1577999647488; Thu, 02 Jan 2020 13:14:07 -0800 (PST) Received: from localhost.localdomain (c-73-69-118-222.hsd1.nh.comcast.net. [73.69.118.222]) by smtp.gmail.com with ESMTPSA id f97sm17384185qtb.18.2020.01.02.13.14.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jan 2020 13:14:06 -0800 (PST) From: Pavel Tatashin To: pasha.tatashin@soleen.com, jmorris@namei.org, sashal@kernel.org, linux-kernel@vger.kernel.org, catalin.marinas@arm.com, will@kernel.org, steve.capper@arm.com, linux-arm-kernel@lists.infradead.org, maz@kernel.org, james.morse@arm.com, vladimir.murzin@arm.com, mark.rutland@arm.com, tglx@linutronix.de, gregkh@linuxfoundation.org, allison@lohutok.net, info@metux.net, alexios.zavras@intel.com, sstabellini@kernel.org, boris.ostrovsky@oracle.com, jgross@suse.com, stefan@agner.ch, yamada.masahiro@socionext.com, xen-devel@lists.xenproject.org, linux@armlinux.org.uk, andrew.cooper3@citrix.com, julien@xen.org Date: Thu, 2 Jan 2020 16:13:55 -0500 Message-Id: <20200102211357.8042-5-pasha.tatashin@soleen.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102211357.8042-1-pasha.tatashin@soleen.com> References: <20200102211357.8042-1-pasha.tatashin@soleen.com> Subject: [Xen-devel] [PATCH v5 4/6] arm64: remove __asm_flush_icache_range X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" __asm_flush_icache_range is an alias to __asm_flush_cache_user_range, but now that these functions are called from C wrappers the fall through can instead be done at a higher level. Remove the __asm_flush_icache_range alias in assembly, and instead call __flush_cache_user_range() from __flush_icache_range(). Signed-off-by: Pavel Tatashin --- arch/arm64/include/asm/cacheflush.h | 5 +---- arch/arm64/mm/cache.S | 14 -------------- arch/arm64/mm/flush.c | 2 +- 3 files changed, 2 insertions(+), 19 deletions(-) diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h index cb00c61e0bde..047af338ba15 100644 --- a/arch/arm64/include/asm/cacheflush.h +++ b/arch/arm64/include/asm/cacheflush.h @@ -61,7 +61,6 @@ * - kaddr - page address * - size - region size */ -extern void __asm_flush_icache_range(unsigned long start, unsigned long end); extern long __asm_flush_cache_user_range(unsigned long start, unsigned long end); extern int __asm_invalidate_icache_range(unsigned long start, @@ -87,9 +86,7 @@ static inline long __flush_cache_user_range(unsigned long start, static inline void __flush_icache_range(unsigned long start, unsigned long end) { - uaccess_ttbr0_enable(); - __asm_flush_icache_range(start, end); - uaccess_ttbr0_disable(); + __flush_cache_user_range(start, end); } static inline int invalidate_icache_range(unsigned long start, diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S index 602b9aa8603a..1981cbaf5d92 100644 --- a/arch/arm64/mm/cache.S +++ b/arch/arm64/mm/cache.S @@ -14,19 +14,6 @@ #include #include -/* - * __asm_flush_icache_range(start,end) - * - * Ensure that the I and D caches are coherent within specified region. - * This is typically used when code has been written to a memory region, - * and will be executed. - * - * - start - virtual start address of region - * - end - virtual end address of region - */ -ENTRY(__asm_flush_icache_range) - /* FALLTHROUGH */ - /* * __asm_flush_cache_user_range(start,end) * @@ -62,7 +49,6 @@ alternative_else_nop_endif 1: ret 9: mov x0, #-EFAULT b 1b -ENDPROC(__asm_flush_icache_range) ENDPROC(__asm_flush_cache_user_range) /* diff --git a/arch/arm64/mm/flush.c b/arch/arm64/mm/flush.c index b23f34d23f31..61521285f27d 100644 --- a/arch/arm64/mm/flush.c +++ b/arch/arm64/mm/flush.c @@ -75,7 +75,7 @@ EXPORT_SYMBOL(flush_dcache_page); /* * Additional functions defined in assembly. */ -EXPORT_SYMBOL(__asm_flush_icache_range); +EXPORT_SYMBOL(__asm_flush_cache_user_range); #ifdef CONFIG_ARCH_HAS_PMEM_API void arch_wb_cache_pmem(void *addr, size_t size)