@@ -85,14 +85,6 @@ struct irq_alloc_info {
union {
struct ioapic_alloc_info ioapic;
struct uv_alloc_info uv;
-
- int unused;
-#ifdef CONFIG_PCI_MSI
- struct {
- struct pci_dev *msi_dev;
- irq_hw_number_t msi_hwirq;
- };
-#endif
};
};
@@ -189,7 +189,6 @@ int native_setup_msi_irqs(struct pci_dev
init_irq_alloc_info(&info, NULL);
info.type = X86_IRQ_ALLOC_TYPE_PCI_MSI;
- info.msi_dev = dev;
domain = irq_remapping_get_irq_domain(&info);
if (domain == NULL)
@@ -208,7 +207,7 @@ void native_teardown_msi_irq(unsigned in
static irq_hw_number_t pci_msi_get_hwirq(struct msi_domain_info *info,
msi_alloc_info_t *arg)
{
- return arg->msi_hwirq;
+ return arg->hwirq;
}
int pci_msi_prepare(struct irq_domain *domain, struct device *dev, int nvec,
@@ -218,7 +217,6 @@ int pci_msi_prepare(struct irq_domain *d
struct msi_desc *desc = first_pci_msi_entry(pdev);
init_irq_alloc_info(arg, NULL);
- arg->msi_dev = pdev;
if (desc->msi_attrib.is_msix) {
arg->type = X86_IRQ_ALLOC_TYPE_PCI_MSIX;
} else {
@@ -232,7 +230,8 @@ EXPORT_SYMBOL_GPL(pci_msi_prepare);
void pci_msi_set_desc(msi_alloc_info_t *arg, struct msi_desc *desc)
{
- arg->msi_hwirq = pci_msi_domain_calc_hwirq(desc);
+ arg->desc = desc;
+ arg->hwirq = pci_msi_domain_calc_hwirq(desc);
}
EXPORT_SYMBOL_GPL(pci_msi_set_desc);
@@ -3514,7 +3514,7 @@ static int get_devid(struct irq_alloc_in
return get_hpet_devid(info->devid);
case X86_IRQ_ALLOC_TYPE_PCI_MSI:
case X86_IRQ_ALLOC_TYPE_PCI_MSIX:
- return get_device_id(&info->msi_dev->dev);
+ return get_device_id(msi_desc_to_dev(info->desc));
default:
WARN_ON_ONCE(1);
return -1;
@@ -3688,7 +3688,8 @@ static int irq_remapping_alloc(struct ir
info->type == X86_IRQ_ALLOC_TYPE_PCI_MSIX) {
bool align = (info->type == X86_IRQ_ALLOC_TYPE_PCI_MSI);
- index = alloc_irq_index(devid, nr_irqs, align, info->msi_dev);
+ index = alloc_irq_index(devid, nr_irqs, align,
+ msi_desc_to_pci_dev(info->desc));
} else {
index = alloc_irq_index(devid, nr_irqs, false, NULL);
}
@@ -1118,7 +1118,7 @@ static struct irq_domain *intel_get_irq_
return map_hpet_to_ir(info->devid);
case X86_IRQ_ALLOC_TYPE_PCI_MSI:
case X86_IRQ_ALLOC_TYPE_PCI_MSIX:
- return map_dev_to_ir(info->msi_dev);
+ return map_dev_to_ir(msi_desc_to_pci_dev(info->desc));
default:
WARN_ON_ONCE(1);
return NULL;
@@ -1287,7 +1287,7 @@ static void intel_irq_remapping_prepare_
if (info->type == X86_IRQ_ALLOC_TYPE_HPET)
set_hpet_sid(irte, info->devid);
else
- set_msi_sid(irte, info->msi_dev);
+ set_msi_sid(irte, msi_desc_to_pci_dev(info->desc));
msg->address_hi = MSI_ADDR_BASE_HI;
msg->data = sub_handle;
@@ -1534,7 +1534,7 @@ static struct irq_chip hv_msi_irq_chip =
static irq_hw_number_t hv_msi_domain_ops_get_hwirq(struct msi_domain_info *info,
msi_alloc_info_t *arg)
{
- return arg->msi_hwirq;
+ return arg->hwirq;
}
static struct msi_domain_ops hv_msi_ops = {
Convert the interrupt remap drivers to retrieve the pci device from the msi descriptor and use info::hwirq. This is the first step to prepare x86 for using the generic MSI domain ops. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Wei Liu <wei.liu@kernel.org> Cc: Stephen Hemminger <sthemmin@microsoft.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: linux-pci@vger.kernel.org Cc: linux-hyperv@vger.kernel.org Cc: iommu@lists.linux-foundation.org Cc: Haiyang Zhang <haiyangz@microsoft.com> Cc: Lu Baolu <baolu.lu@linux.intel.com> --- arch/x86/include/asm/hw_irq.h | 8 -------- arch/x86/kernel/apic/msi.c | 7 +++---- drivers/iommu/amd/iommu.c | 5 +++-- drivers/iommu/intel/irq_remapping.c | 4 ++-- drivers/pci/controller/pci-hyperv.c | 2 +- 5 files changed, 9 insertions(+), 17 deletions(-)