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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?q?DwXPVV6lwlDMUEhIYzaE8B1fUMYuqV?= =?utf-8?q?jdxYwaus7/PK3qxuoEYvaPf85zJCPNtmlu8BAvTnBJGJGp61yz2Ju26mfl+HEyd2Y?= =?utf-8?q?gpD5OfBSrrhDvM/XHEpH1va9oHSvntJeRvweG6L1cVcnAOL1r4z3c0uwP/u/dYf4d?= =?utf-8?q?mufhuOr7gVYnTGsEWpy3Y6ydM/S5rTha9CzNHJWsfndCI9U8SZ+q+rJSRHaYNYGmu?= =?utf-8?q?sty0ZK0GMa9VNSm0CTFEfWllnOHfQuW1nGHBl7kyRKAA4gLDTaUqHXIT6Yfq5nE9n?= =?utf-8?q?5Y7dyTJ0Kwr5e3u4YF09T4NZ8acK/GBXEGvmP5smIojgYN3ocfGqRl2C8a+dLJ94n?= =?utf-8?q?4/slvPXpp5NCC0pg3PAtsFKTbXL++ARnEygCBLbUTlQobWdVyM757ngGIyIago6Xn?= =?utf-8?q?GRuBXRtjGccEqDZo8keQH36l4+mmqfJ0R3dC00MuExArTHJXkvuykXKS1wbZbNZFV?= =?utf-8?q?piFizB0o4QmpGoDwPm5tbxLbB90qV/zwVlKQ6M1aPgVUW/RnUV/m+mW/wp2pTRjN+?= =?utf-8?q?Ad4/TS68tCDMkewcPWu+kvKJKJiURK+XRzGLU9sxIp85eGEJRX1Xp/P/3ev2U7ztC?= =?utf-8?q?G9mKY8JHyvEx+PYmhamGQg5wBSTxNHeqfxegolTBumTq6Z87z4EGK41xOOnDdJys+?= =?utf-8?q?V17iDeOC7BbNMALamPkMCRWmjYz7TWzADWxJB7+CwrEplR9bYZutj5pRKpuN0mGQF?= =?utf-8?q?CC4AI1O2QRqJuNkr2PSpoNWtpPhnI9dWnB/SIE8pBO7mBfQJjwou8lSFT/Xf9BFDD?= =?utf-8?q?+0TK2ni0ZysxpQme2cPQq0j5dcLVmagfQaT/H8PP271eYAhCx2DOe4DS73Az4gqZh?= =?utf-8?q?uPV/xhqaAP7hYOfDuYi+TzvsH436/QJ3NlMQbXtcf5kTfk9HsD78V9MVqnKU+wlf3?= =?utf-8?q?kTiBRFCgJTr9PvoMpw/E+dsqp59DiiUIm5Pe/LMhkvYHbdlfMYCmk5VTnjXb2Yj/d?= =?utf-8?q?PyQ6yRypxqOIxafP36whQsfBpUwnBlYF/YZUp8BfLUYswZJwc+qlETWHFUqZtuHH7?= =?utf-8?q?7hil7ayhk5YWOrXDMUmGtQxozD9/mGOFf6qODiu0mb0QypZ5QHnWbZgPz4i4oMjXN?= =?utf-8?q?QlKzLrw9YM/VnBVWLZxFGBbNeZwVFw6tIjf3SAyZWB8Z4j1fnNrzUBSROiCSmHHSz?= =?utf-8?q?kczhBOLiXTS09CEwljhMivfy2RVzKok9P/ZZx6tDuxqY7rGekVVcgVKef2vZt2z2I?= =?utf-8?q?KVbXQchTjVXR6ZoNRaKCKf6R+eDexEilSnniBpOhEk3SvCfBTvj2SyVnnlORYc+uV?= =?utf-8?q?JUg7E3eaMFqOTV?= X-MS-Exchange-CrossTenant-Network-Message-Id: bcdc9994-d0a8-4d2e-bed0-08d8ede296d1 X-MS-Exchange-CrossTenant-AuthSource: DS7PR03MB5608.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Mar 2021 10:01:12.2650 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qr+n25OsKlMfAzUVif74wCKJoREMdwoeesqWrY+glNBwqpb+t02D+zE6kdo6mrL197HOyxSCmUj01XgzZ1DWbg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR03MB4969 X-OriginatorOrg: citrix.com This logic is pulled out from xc_cpuid_apply_policy and placed into a separate helper. No functional change intended. Signed-off-by: Roger Pau Monné --- tools/include/xenctrl.h | 4 + tools/libs/guest/xg_cpuid_x86.c | 181 +++++++++++++++++--------------- 2 files changed, 102 insertions(+), 83 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 6f7158156fa..9f94e61523e 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -2631,6 +2631,10 @@ int xc_cpu_policy_calc_compatible(xc_interface *xch, int xc_cpu_policy_make_compatible(xc_interface *xch, xc_cpu_policy_t policy, bool hvm); +/* Setup the policy topology. */ +int xc_cpu_policy_topology(xc_interface *xch, xc_cpu_policy_t policy, + bool hvm); + int xc_get_cpu_levelling_caps(xc_interface *xch, uint32_t *caps); int xc_get_cpu_featureset(xc_interface *xch, uint32_t index, uint32_t *nr_features, uint32_t *featureset); diff --git a/tools/libs/guest/xg_cpuid_x86.c b/tools/libs/guest/xg_cpuid_x86.c index 2abaf400a2b..d50822c0abb 100644 --- a/tools/libs/guest/xg_cpuid_x86.c +++ b/tools/libs/guest/xg_cpuid_x86.c @@ -433,13 +433,11 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, { int rc; xc_dominfo_t di; - unsigned int i, nr_leaves, nr_msrs; + unsigned int nr_leaves, nr_msrs; xen_cpuid_leaf_t *leaves = NULL; struct cpuid_policy *p = NULL; struct cpu_policy policy = { }; uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; - uint32_t host_featureset[FEATURESET_NR_ENTRIES] = {}; - uint32_t len = ARRAY_SIZE(host_featureset); if ( xc_domain_getinfo(xch, domid, 1, &di) != 1 || di.domid != domid ) @@ -462,22 +460,6 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, (p = calloc(1, sizeof(*p))) == NULL ) goto out; - /* Get the host policy. */ - rc = xc_get_cpu_featureset(xch, XEN_SYSCTL_cpu_featureset_host, - &len, host_featureset); - if ( rc ) - { - /* Tolerate "buffer too small", as we've got the bits we need. */ - if ( errno == ENOBUFS ) - rc = 0; - else - { - PERROR("Failed to obtain host featureset"); - rc = -errno; - goto out; - } - } - /* Get the domain's default policy. */ nr_msrs = 0; rc = get_system_cpu_policy(xch, di.hvm ? XEN_SYSCTL_cpu_policy_hvm_default @@ -564,70 +546,10 @@ int xc_cpuid_apply_policy(xc_interface *xch, uint32_t domid, bool restore, } } - if ( !di.hvm ) - { - /* - * On hardware without CPUID Faulting, PV guests see real topology. - * As a consequence, they also need to see the host htt/cmp fields. - */ - p->basic.htt = test_bit(X86_FEATURE_HTT, host_featureset); - p->extd.cmp_legacy = test_bit(X86_FEATURE_CMP_LEGACY, host_featureset); - } - else - { - /* - * Topology for HVM guests is entirely controlled by Xen. For now, we - * hardcode APIC_ID = vcpu_id * 2 to give the illusion of no SMT. - */ - p->basic.htt = true; - p->extd.cmp_legacy = false; - - /* - * Leaf 1 EBX[23:16] is Maximum Logical Processors Per Package. - * Update to reflect vLAPIC_ID = vCPU_ID * 2, but make sure to avoid - * overflow. - */ - if ( !(p->basic.lppp & 0x80) ) - p->basic.lppp *= 2; - - switch ( p->x86_vendor ) - { - case X86_VENDOR_INTEL: - for ( i = 0; (p->cache.subleaf[i].type && - i < ARRAY_SIZE(p->cache.raw)); ++i ) - { - p->cache.subleaf[i].cores_per_package = - (p->cache.subleaf[i].cores_per_package << 1) | 1; - p->cache.subleaf[i].threads_per_cache = 0; - } - break; - - case X86_VENDOR_AMD: - case X86_VENDOR_HYGON: - /* - * Leaf 0x80000008 ECX[15:12] is ApicIdCoreSize. - * Leaf 0x80000008 ECX[7:0] is NumberOfCores (minus one). - * Update to reflect vLAPIC_ID = vCPU_ID * 2. But avoid - * - overflow, - * - going out of sync with leaf 1 EBX[23:16], - * - incrementing ApicIdCoreSize when it's zero (which changes the - * meaning of bits 7:0). - * - * UPDATE: I addition to avoiding overflow, some - * proprietary operating systems have trouble with - * apic_id_size values greater than 7. Limit the value to - * 7 for now. - */ - if ( p->extd.nc < 0x7f ) - { - if ( p->extd.apic_id_size != 0 && p->extd.apic_id_size < 0x7 ) - p->extd.apic_id_size++; - - p->extd.nc = (p->extd.nc << 1) | 1; - } - break; - } - } + policy.cpuid = p; + rc = xc_cpu_policy_topology(xch, &policy, di.hvm); + if ( rc ) + goto out; rc = x86_cpuid_copy_to_buffer(p, leaves, &nr_leaves); if ( rc ) @@ -1257,3 +1179,96 @@ int xc_cpu_policy_make_compatible(xc_interface *xch, xc_cpu_policy_t policy, xc_cpu_policy_destroy(host); return rc; } + +int xc_cpu_policy_topology(xc_interface *xch, xc_cpu_policy_t policy, + bool hvm) +{ + if ( !hvm ) + { + xc_cpu_policy_t host; + int rc; + + host = xc_cpu_policy_init(); + if ( !host ) + { + errno = ENOMEM; + return -1; + } + + rc = xc_cpu_policy_get_system(xch, XEN_SYSCTL_cpu_policy_host, host); + if ( rc ) + { + ERROR("Failed to get host policy"); + xc_cpu_policy_destroy(host); + return rc; + } + + + /* + * On hardware without CPUID Faulting, PV guests see real topology. + * As a consequence, they also need to see the host htt/cmp fields. + */ + policy->cpuid->basic.htt = host->cpuid->basic.htt; + policy->cpuid->extd.cmp_legacy = host->cpuid->extd.cmp_legacy; + } + else + { + unsigned int i; + + /* + * Topology for HVM guests is entirely controlled by Xen. For now, we + * hardcode APIC_ID = vcpu_id * 2 to give the illusion of no SMT. + */ + policy->cpuid->basic.htt = true; + policy->cpuid->extd.cmp_legacy = false; + + /* + * Leaf 1 EBX[23:16] is Maximum Logical Processors Per Package. + * Update to reflect vLAPIC_ID = vCPU_ID * 2, but make sure to avoid + * overflow. + */ + if ( !(policy->cpuid->basic.lppp & 0x80) ) + policy->cpuid->basic.lppp *= 2; + + switch ( policy->cpuid->x86_vendor ) + { + case X86_VENDOR_INTEL: + for ( i = 0; (policy->cpuid->cache.subleaf[i].type && + i < ARRAY_SIZE(policy->cpuid->cache.raw)); ++i ) + { + policy->cpuid->cache.subleaf[i].cores_per_package = + (policy->cpuid->cache.subleaf[i].cores_per_package << 1) | 1; + policy->cpuid->cache.subleaf[i].threads_per_cache = 0; + } + break; + + case X86_VENDOR_AMD: + case X86_VENDOR_HYGON: + /* + * Leaf 0x80000008 ECX[15:12] is ApicIdCoreSize. + * Leaf 0x80000008 ECX[7:0] is NumberOfCores (minus one). + * Update to reflect vLAPIC_ID = vCPU_ID * 2. But avoid + * - overflow, + * - going out of sync with leaf 1 EBX[23:16], + * - incrementing ApicIdCoreSize when it's zero (which changes the + * meaning of bits 7:0). + * + * UPDATE: I addition to avoiding overflow, some + * proprietary operating systems have trouble with + * apic_id_size values greater than 7. Limit the value to + * 7 for now. + */ + if ( policy->cpuid->extd.nc < 0x7f ) + { + if ( policy->cpuid->extd.apic_id_size != 0 && + policy->cpuid->extd.apic_id_size < 0x7 ) + policy->cpuid->extd.apic_id_size++; + + policy->cpuid->extd.nc = (policy->cpuid->extd.nc << 1) | 1; + } + break; + } + } + + return 0; +}