From patchwork Thu Aug 26 17:03:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= X-Patchwork-Id: 12460283 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0C351C432BE for ; Thu, 26 Aug 2021 17:04:26 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C49AC60FD8 for ; Thu, 26 Aug 2021 17:04:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org C49AC60FD8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=invisiblethingslab.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lists.xenproject.org Received: from list by lists.xenproject.org with outflank-mailman.173163.315938 (Exim 4.92) (envelope-from ) id 1mJInT-0003BP-8e; Thu, 26 Aug 2021 17:04:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 173163.315938; Thu, 26 Aug 2021 17:04:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mJInT-0003BI-3t; Thu, 26 Aug 2021 17:04:11 +0000 Received: by outflank-mailman (input) for mailman id 173163; Thu, 26 Aug 2021 17:04:10 +0000 Received: from all-amaz-eas1.inumbo.com ([34.197.232.57] helo=us1-amaz-eas2.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1mJInS-0003BC-76 for xen-devel@lists.xenproject.org; Thu, 26 Aug 2021 17:04:10 +0000 Received: from wout4-smtp.messagingengine.com (unknown [64.147.123.20]) by us1-amaz-eas2.inumbo.com (Halon) with ESMTPS id a0c95788-068f-11ec-aa33-12813bfff9fa; Thu, 26 Aug 2021 17:04:09 +0000 (UTC) Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailout.west.internal (Postfix) with ESMTP id CD5D63200936; Thu, 26 Aug 2021 13:04:07 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute3.internal (MEProxy); Thu, 26 Aug 2021 13:04:08 -0400 Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 26 Aug 2021 13:04:05 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a0c95788-068f-11ec-aa33-12813bfff9fa DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:message-id:mime-version:subject:to:x-me-proxy :x-me-proxy:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=CTG8y+ c/tcgdmRwNHm6OdItlKpgJ5dHJdci3GZ1+H3o=; b=k40fEJitOfb15NIxBwIXcV 92cjJLnLkhxBk6uoOLfedGCU4FCwsn7Nn80dRJ/KXEV1H+/5FNfc1el4GGuwvMTL d4MY4Lw5RwLLGuXKEjGRPvoAFsCoEfa2tMgEHL2CffAHNY/FPONnpu/3+AhP3P5A GiH8lAT6bW6oKpmG9sLoY2iHGetQFqPjUdQNofoY2j3P8+tupzYDIOdGSnkQp1/i B6i1gnK+i6tje33Bklx9sUKFRbMLb8mHXm/H7viyBBtFhslpjnthNR+8lNvAZ/6E nygDJWncbuStrjCPuAWaXr4He2YLOPW2VFZXeYy93gg9OxpW5O9eGiNB8ZrYtcoA == X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvtddrudduuddguddtjecutefuodetggdotefrod ftvfcurfhrohhfihhlvgemucfhrghsthforghilhdpqfgfvfdpuffrtefokffrpgfnqfgh necuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd enucfjughrpefhvffufffkofggtghogfesthekredtredtjeenucfhrhhomhepofgrrhgv khcuofgrrhgtiiihkhhofihskhhiqdfikphrvggtkhhiuceomhgrrhhmrghrvghksehinh hvihhsihgslhgvthhhihhnghhslhgrsgdrtghomheqnecuggftrfgrthhtvghrnhepteeg teekueekfffhjeeuleduheettdekueeitdfggfdthfevfeeuieeihfduheegnecuvehluh hsthgvrhfuihiivgeptdenucfrrghrrghmpehmrghilhhfrhhomhepmhgrrhhmrghrvghk sehinhhvihhsihgslhgvthhhihhnghhslhgrsgdrtghomh X-ME-Proxy: From: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Marek_Marczykowski-G=C3=B3recki?= , stable@vger.kernel.org, xen-devel@lists.xenproject.org, Bjorn Helgaas , Marc Zyngier , Thomas Gleixner , linux-pci@vger.kernel.org (open list:PCI SUBSYSTEM) Subject: [PATCH v2] PCI/MSI: Skip masking MSI-X on Xen PV Date: Thu, 26 Aug 2021 19:03:42 +0200 Message-Id: <20210826170342.135172-1-marmarek@invisiblethingslab.com> X-Mailer: git-send-email 2.31.1 MIME-Version: 1.0 Organization: Invisible Things Lab When running as Xen PV guest, masking MSI-X is a responsibility of the hypervisor. Guest has no write access to relevant BAR at all - when it tries to, it results in a crash like this: BUG: unable to handle page fault for address: ffffc9004069100c #PF: supervisor write access in kernel mode #PF: error_code(0x0003) - permissions violation PGD 18f1c067 P4D 18f1c067 PUD 4dbd067 PMD 4fba067 PTE 80100000febd4075 Oops: 0003 [#1] SMP NOPTI CPU: 0 PID: 234 Comm: kworker/0:2 Tainted: G W 5.14.0-rc7-1.fc32.qubes.x86_64 #15 Workqueue: events work_for_cpu_fn RIP: e030:__pci_enable_msix_range.part.0+0x26b/0x5f0 Code: 2f 96 ff 48 89 44 24 28 48 89 c7 48 85 c0 0f 84 f6 01 00 00 45 0f b7 f6 48 8d 40 0c ba 01 00 00 00 49 c1 e6 04 4a 8d 4c 37 1c <89> 10 48 83 c0 10 48 39 c1 75 f5 41 0f b6 44 24 6a 84 c0 0f 84 48 RSP: e02b:ffffc9004018bd50 EFLAGS: 00010212 RAX: ffffc9004069100c RBX: ffff88800ed412f8 RCX: ffffc9004069105c RDX: 0000000000000001 RSI: 00000000000febd4 RDI: ffffc90040691000 RBP: 0000000000000003 R08: 0000000000000000 R09: 00000000febd404f R10: 0000000000007ff0 R11: ffff88800ee8ae40 R12: ffff88800ed41000 R13: 0000000000000000 R14: 0000000000000040 R15: 00000000feba0000 FS: 0000000000000000(0000) GS:ffff888018400000(0000) knlGS:0000000000000000 CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: ffff8000007f5ea0 CR3: 0000000012f6a000 CR4: 0000000000000660 Call Trace: e1000e_set_interrupt_capability+0xbf/0xd0 [e1000e] e1000_probe+0x41f/0xdb0 [e1000e] local_pci_probe+0x42/0x80 (...) There is pci_msi_ignore_mask variable for bypassing MSI(-X) masking on Xen PV, but msix_mask_all() missed checking it. Add the check there too. Fixes: 7d5ec3d36123 ("PCI/MSI: Mask all unused MSI-X entries") Cc: stable@vger.kernel.org Signed-off-by: Marek Marczykowski-Górecki Acked-by: Bjorn Helgaas --- Cc: xen-devel@lists.xenproject.org Changes in v2: - update commit message (MSI -> MSI-X) --- drivers/pci/msi.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index e5e75331b415..3a9f4f8ad8f9 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c @@ -776,6 +776,9 @@ static void msix_mask_all(void __iomem *base, int tsize) u32 ctrl = PCI_MSIX_ENTRY_CTRL_MASKBIT; int i; + if (pci_msi_ignore_mask) + return; + for (i = 0; i < tsize; i++, base += PCI_MSIX_ENTRY_SIZE) writel(ctrl, base + PCI_MSIX_ENTRY_VECTOR_CTRL); }