@@ -309,6 +309,7 @@ real_start_efi:
bl check_cpu_mode
bl cpu_init
bl create_page_tables
+ load_paddr x0, boot_pgtable
bl enable_mmu
/* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */
@@ -368,29 +369,14 @@ GLOBAL(init_secondary)
#endif
bl check_cpu_mode
bl cpu_init
- bl create_page_tables
+ load_paddr x0, init_ttbr
+ ldr x0, [x0]
bl enable_mmu
/* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */
ldr x0, =secondary_switched
br x0
secondary_switched:
- /*
- * Non-boot CPUs need to move on to the proper pagetables, which were
- * setup in init_secondary_pagetables.
- *
- * XXX: This is not compliant with the Arm Arm.
- */
- ldr x4, =init_ttbr /* VA of TTBR0_EL2 stashed by CPU 0 */
- ldr x4, [x4] /* Actual value */
- dsb sy
- msr TTBR0_EL2, x4
- dsb sy
- isb
- tlbi alle2
- dsb sy /* Ensure completion of TLB flush */
- isb
-
#ifdef CONFIG_EARLY_PRINTK
/* Use a virtual address to access the UART. */
ldr x23, =EARLY_UART_VIRTUAL_ADDRESS
@@ -661,9 +647,13 @@ ENDPROC(create_page_tables)
* mapping. In other word, the caller is responsible to switch to the runtime
* mapping.
*
- * Clobbers x0 - x3
+ * Inputs:
+ * x0 : Physical address of the page tables.
+ *
+ * Clobbers x0 - x4
*/
enable_mmu:
+ mov x4, x0
PRINT("- Turning on paging -\r\n")
/*
@@ -674,8 +664,7 @@ enable_mmu:
dsb nsh
/* Write Xen's PT's paddr into TTBR0_EL2 */
- load_paddr x0, boot_pgtable
- msr TTBR0_EL2, x0
+ msr TTBR0_EL2, x4
isb
mrs x0, SCTLR_EL2
@@ -771,26 +771,9 @@ void __init setup_pagetables(unsigned long boot_phys_offset)
#endif
}
-static void clear_boot_pagetables(void)
-{
- /*
- * Clear the copy of the boot pagetables. Each secondary CPU
- * rebuilds these itself (see head.S).
- */
- clear_table(boot_pgtable);
-#ifdef CONFIG_ARM_64
- clear_table(boot_first);
- clear_table(boot_first_id);
-#endif
- clear_table(boot_second);
- clear_table(boot_third);
-}
-
#ifdef CONFIG_ARM_64
int init_secondary_pagetables(int cpu)
{
- clear_boot_pagetables();
-
/* Set init_ttbr for this CPU coming up. All CPus share a single setof
* pagetables, but rewrite it each time for consistency with 32 bit. */
init_ttbr = (uintptr_t) xen_pgtable + phys_offset;
@@ -833,8 +816,6 @@ int init_secondary_pagetables(int cpu)
per_cpu(xen_pgtable, cpu) = first;
per_cpu(xen_dommap, cpu) = domheap;
- clear_boot_pagetables();
-
/* Set init_ttbr for this CPU coming up */
init_ttbr = __pa(first);
clean_dcache(init_ttbr);
@@ -457,12 +457,14 @@ int __cpu_up(unsigned int cpu)
smp_up_cpu = cpu_logical_map(cpu);
clean_dcache(smp_up_cpu);
+ update_identity_mapping(true);
rc = arch_cpu_up(cpu);
console_end_sync();
if ( rc < 0 )
{
+ update_identity_mapping(false);
printk("Failed to bring up CPU%d\n", cpu);
return rc;
}
@@ -493,6 +495,7 @@ int __cpu_up(unsigned int cpu)
init_data.cpuid = ~0;
smp_up_cpu = MPIDR_INVALID;
clean_dcache(smp_up_cpu);
+ update_identity_mapping(false);
if ( !cpu_online(cpu) )
{