Message ID | 20220812192448.43016-2-julien@xen.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | xen/arm: More clean-ups and improvement | expand |
Hi Julien, > -----Original Message----- > From: Xen-devel <xen-devel-bounces@lists.xenproject.org> On Behalf Of > Julien Grall > Sent: 2022年8月13日 3:25 > To: xen-devel@lists.xenproject.org > Cc: julien@xen.org; Julien Grall <jgrall@amazon.com>; Stefano Stabellini > <sstabellini@kernel.org>; Bertrand Marquis <Bertrand.Marquis@arm.com>; > Volodymyr Babchuk <Volodymyr_Babchuk@epam.com> > Subject: [PATCH 1/7] xen/arm64: head: Don't set x22 and update the > documentation > > From: Julien Grall <jgrall@amazon.com> > > Since commit 7e14a47e7c73 ("xen/arm64: head Rework and document > launch()"), the boot code is setting x22 but not read it. > > So remove the two instructions setting x22 and update the documentation > to show x22 has no specific purpose. > > Signed-off-by: Julien Grall <jgrall@amazon.com> > --- > xen/arch/arm/arm64/head.S | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 1babcc65d7c9..26cc7705f556 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -71,7 +71,7 @@ > * x19 - paddr(start) > * x20 - phys offset > * x21 - DTB address (boot cpu only) > - * x22 - is_secondary_cpu > + * x22 - > * x23 - UART address > * x24 - > * x25 - > @@ -305,8 +305,6 @@ real_start_efi: > #endif > PRINT("- Boot CPU booting -\r\n") > > - mov x22, #0 /* x22 := is_secondary_cpu */ > - > bl check_cpu_mode > bl cpu_init > bl create_page_tables > @@ -345,8 +343,6 @@ GLOBAL(init_secondary) > adr x19, start /* x19 := paddr (start) */ > sub x20, x19, x0 /* x20 := phys-offset */ > > - mov x22, #1 /* x22 := is_secondary_cpu */ > - > mrs x0, mpidr_el1 > ldr x13, =(~MPIDR_HWID_MASK) > bic x24, x0, x13 /* Mask out flags to get CPU ID */ > -- > 2.37.1 > Reviewed-by: Wei Chen <Wei.Chen@arm.com>
Hi Julien, > On 12 Aug 2022, at 20:24, Julien Grall <julien@xen.org> wrote: > > From: Julien Grall <jgrall@amazon.com> > > Since commit 7e14a47e7c73 ("xen/arm64: head Rework and document > launch()"), the boot code is setting x22 but not read it. > > So remove the two instructions setting x22 and update the documentation > to show x22 has no specific purpose. > > Signed-off-by: Julien Grall <jgrall@amazon.com> Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com> Cheers Bertrand > --- > xen/arch/arm/arm64/head.S | 6 +----- > 1 file changed, 1 insertion(+), 5 deletions(-) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 1babcc65d7c9..26cc7705f556 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -71,7 +71,7 @@ > * x19 - paddr(start) > * x20 - phys offset > * x21 - DTB address (boot cpu only) > - * x22 - is_secondary_cpu > + * x22 - > * x23 - UART address > * x24 - > * x25 - > @@ -305,8 +305,6 @@ real_start_efi: > #endif > PRINT("- Boot CPU booting -\r\n") > > - mov x22, #0 /* x22 := is_secondary_cpu */ > - > bl check_cpu_mode > bl cpu_init > bl create_page_tables > @@ -345,8 +343,6 @@ GLOBAL(init_secondary) > adr x19, start /* x19 := paddr (start) */ > sub x20, x19, x0 /* x20 := phys-offset */ > > - mov x22, #1 /* x22 := is_secondary_cpu */ > - > mrs x0, mpidr_el1 > ldr x13, =(~MPIDR_HWID_MASK) > bic x24, x0, x13 /* Mask out flags to get CPU ID */ > -- > 2.37.1 >
diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 1babcc65d7c9..26cc7705f556 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -71,7 +71,7 @@ * x19 - paddr(start) * x20 - phys offset * x21 - DTB address (boot cpu only) - * x22 - is_secondary_cpu + * x22 - * x23 - UART address * x24 - * x25 - @@ -305,8 +305,6 @@ real_start_efi: #endif PRINT("- Boot CPU booting -\r\n") - mov x22, #0 /* x22 := is_secondary_cpu */ - bl check_cpu_mode bl cpu_init bl create_page_tables @@ -345,8 +343,6 @@ GLOBAL(init_secondary) adr x19, start /* x19 := paddr (start) */ sub x20, x19, x0 /* x20 := phys-offset */ - mov x22, #1 /* x22 := is_secondary_cpu */ - mrs x0, mpidr_el1 ldr x13, =(~MPIDR_HWID_MASK) bic x24, x0, x13 /* Mask out flags to get CPU ID */