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bh=7H1lvZLVrUyYMTjixlNAUXTLFqacVwjL/tsS+Mp+YSE=; b=aFLTQMpv6G6TnNZIF9+YRVleSDcyLDMlwsKv5VP+PUqpJxErOVKMOWAiWZjRmlbs51ELgpHJnOVX44Sqivlhwbx8MqYaWi+ckhNxeFMqUQk8FK14snw3+0b8Z4RFRuqtoXJLaeu7D3FpUccagXjEGrhwAKxaM+vBcZkpT3xXBuQ= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Jan Beulich , Stefano Stabellini , "Anthony PERARD" , CC: Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , "Stewart Hildebrand" , Xenia Ragiadakou , Honglei Huang , Julia Zhang , Chen Jiqian , Huang Rui Subject: [RFC XEN PATCH 2/6] vpci: accept BAR writes if dom0 is PVH Date: Sun, 12 Mar 2023 15:54:51 +0800 Message-ID: <20230312075455.450187-3-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230312075455.450187-1-ray.huang@amd.com> References: <20230312075455.450187-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT110:EE_|PH7PR12MB7455:EE_ X-MS-Office365-Filtering-Correlation-Id: 9ca02b2e-99f9-486a-a652-08db22cf2713 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Mar 2023 07:55:31.0668 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9ca02b2e-99f9-486a-a652-08db22cf2713 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT110.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7455 From: Chen Jiqian When dom0 is PVH and we want to passthrough gpu to guest, we should allow BAR writes even through BAR is mapped. If not, the value of BARs are not initialized when guest firstly start. Signed-off-by: Chen Jiqian Signed-off-by: Huang Rui --- xen/drivers/vpci/header.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index ec2e978a4e..918d11fbce 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -392,7 +392,7 @@ static void cf_check bar_write( * Xen only cares whether the BAR is mapped into the p2m, so allow BAR * writes as long as the BAR is not mapped into the p2m. */ - if ( bar->enabled ) + if ( pci_conf_read16(pdev->sbdf, PCI_COMMAND) & PCI_COMMAND_MEMORY ) { /* If the value written is the current one avoid printing a warning. */ if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) )