| Message ID | 20230515144259.1009245-3-andrew.cooper3@citrix.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | x86: Introduce MSR_ARCH_CAPS into featuresets | expand |
On 15.05.2023 16:42, Andrew Cooper wrote: > We are about to move MSR_ARCH_CAPS into featureset, but the order of > operations (copy raw policy, then copy x86_capabilitiles[] in) will end up > clobbering the ARCH_CAPS value currently visible in the Host policy. > > To avoid this transient breakage, read from raw_cpu_policy rather than > modifying it in place. This logic will be removed entirely in due course. > > Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Jan Beulich <jbeulich@suse.com>
diff --git a/xen/arch/x86/cpu-policy.c b/xen/arch/x86/cpu-policy.c index 5e7e19fbcda8..49f5465ec445 100644 --- a/xen/arch/x86/cpu-policy.c +++ b/xen/arch/x86/cpu-policy.c @@ -411,7 +411,7 @@ static void __init calculate_host_policy(void) p->platform_info.cpuid_faulting = cpu_has_cpuid_faulting; /* Temporary, until we have known_features[] for feature bits in MSRs. */ - p->arch_caps.raw &= + p->arch_caps.raw = raw_cpu_policy.arch_caps.raw & (ARCH_CAPS_RDCL_NO | ARCH_CAPS_IBRS_ALL | ARCH_CAPS_RSBA | ARCH_CAPS_SKIP_L1DFL | ARCH_CAPS_SSB_NO | ARCH_CAPS_MDS_NO | ARCH_CAPS_IF_PSCHANGE_MC_NO | ARCH_CAPS_TSX_CTRL | ARCH_CAPS_TAA_NO |
We are about to move MSR_ARCH_CAPS into featureset, but the order of operations (copy raw policy, then copy x86_capabilitiles[] in) will end up clobbering the ARCH_CAPS value currently visible in the Host policy. To avoid this transient breakage, read from raw_cpu_policy rather than modifying it in place. This logic will be removed entirely in due course. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Jan Beulich <JBeulich@suse.com> CC: Roger Pau Monné <roger.pau@citrix.com> CC: Wei Liu <wl@xen.org> --- xen/arch/x86/cpu-policy.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)