From patchwork Tue May 23 07:43:18 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Luca Fancellu X-Patchwork-Id: 13251675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 080EBC7EE32 for ; Tue, 23 May 2023 07:44:01 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.538271.838148 (Exim 4.92) (envelope-from ) id 1q1MgL-0004K2-1N; Tue, 23 May 2023 07:43:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 538271.838148; Tue, 23 May 2023 07:43:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q1MgK-0004Jq-Rh; Tue, 23 May 2023 07:43:44 +0000 Received: by outflank-mailman (input) for mailman id 538271; Tue, 23 May 2023 07:43:43 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q1MgJ-0003Zx-4U for xen-devel@lists.xenproject.org; Tue, 23 May 2023 07:43:43 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id 894df1f1-f93d-11ed-8611-37d641c3527e; Tue, 23 May 2023 09:43:41 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A53D6152B; Tue, 23 May 2023 00:44:25 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A3DC33F762; Tue, 23 May 2023 00:43:39 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 894df1f1-f93d-11ed-8611-37d641c3527e From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, wei.chen@arm.com, Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Julien Grall Subject: [PATCH v7 04/12] xen/arm: add SVE exception class handling Date: Tue, 23 May 2023 08:43:18 +0100 Message-Id: <20230523074326.3035745-5-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230523074326.3035745-1-luca.fancellu@arm.com> References: <20230523074326.3035745-1-luca.fancellu@arm.com> MIME-Version: 1.0 SVE has a new exception class with code 0x19, introduce the new code and handle the exception. Signed-off-by: Luca Fancellu Reviewed-by: Bertrand Marquis Reviewed-by: Julien Grall --- Changes from v6: - Add R-by Julien Changes from v5: - modified error messages (Julien) - add R-by Bertrand Changes from v4: - No changes Changes from v3: - No changes Changes from v2: - No changes Changes from v1: - No changes Changes from RFC: - No changes --- xen/arch/arm/include/asm/processor.h | 1 + xen/arch/arm/traps.c | 9 +++++++++ 2 files changed, 10 insertions(+) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index bc683334125c..7e42ff8811fc 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -426,6 +426,7 @@ #define HSR_EC_HVC64 0x16 #define HSR_EC_SMC64 0x17 #define HSR_EC_SYSREG 0x18 +#define HSR_EC_SVE 0x19 #endif #define HSR_EC_INSTR_ABORT_LOWER_EL 0x20 #define HSR_EC_INSTR_ABORT_CURR_EL 0x21 diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 3393e10b52e6..f6437f6aa9c9 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2172,6 +2172,11 @@ void do_trap_guest_sync(struct cpu_user_regs *regs) perfc_incr(trap_sysreg); do_sysreg(regs, hsr); break; + case HSR_EC_SVE: + GUEST_BUG_ON(regs_mode_is_32bit(regs)); + gprintk(XENLOG_WARNING, "Domain tried to use SVE while not allowed\n"); + inject_undef_exception(regs, hsr); + break; #endif case HSR_EC_INSTR_ABORT_LOWER_EL: @@ -2201,6 +2206,10 @@ void do_trap_hyp_sync(struct cpu_user_regs *regs) case HSR_EC_BRK: do_trap_brk(regs, hsr); break; + case HSR_EC_SVE: + /* An SVE exception is a bug somewhere in hypervisor code */ + do_unexpected_trap("SVE trap at EL2", regs); + break; #endif case HSR_EC_DATA_ABORT_CURR_EL: case HSR_EC_INSTR_ABORT_CURR_EL: