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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Rahul Singh , Bertrand Marquis , "Jan Beulich" Subject: [PATCH v4 5/7] iommu/arm: iommu_add_dt_pci_sideband_ids phantom handling Date: Tue, 6 Jun 2023 23:02:18 -0400 Message-ID: <20230607030220.22698-6-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230607030220.22698-1-stewart.hildebrand@amd.com> References: <20230607030220.22698-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AA:EE_|SJ0PR12MB5421:EE_ X-MS-Office365-Filtering-Correlation-Id: ed1fadd7-69b4-44ef-2c03-08db6704540b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: mc0mavjz+MTVAOWtsyJ+3KcXmZ/R5RF2rrtkjjHjftJcFP8BLxEYaj6VPVMp0ijrRAXHGaO7WccgwmdVCJjUsW8hPquZKRvOb0TRwZOUF/7LBOUEvrGvTFmExCHzpz4e+KQNdmZTV4xH3mDBMAmd8ZmxkHdUor4kkM7dmdEf33I0JnQpEHutfcofJeYcV3lHXbGA0yRUtPKJ3CUdS1mprNgU6/64pbKMLFzdmwQfxA5cNoHyDmpN+vqEKWolcs8NF9GR768G26kXcnwVwcALWlDhkS/WHGWvzwimERHC+wdEb8nUvI2NPNIuD4iTfdcPJ9jL1AZ4qY4YNV0AvKSv+XRMc1fCL7BO3FARmL72egQ4Nu1aLAPWmBy43dHQ3FZDbeoAdvim1C0yz5XtQqjUhMeO3KCPGcnXv1tkJ5fGAGwMuuC2Z2nbqOtqrKU9RJ7r4l2n/fywGGAiVqOmcx9gP5LT6KDT7JqxyG3ymf0hVi51Xx8h5x8ImcwNKs95BmphRyk7GUgFqr/g8deox02aNDbnS1PGaCKFouEcApNaN/47wB40arjCAlr5dbH4jPqGHSr8xkM65WgyKRSjL07NO/Oq6jo60hNxTtIs1VH1GZ2HZug5PFbPhxyPH4Lx9kdsT38y1F4GVfvNIZbnTFib/XRQPjB7hHOvwsgNt19zHxHOGOpVx3LgMg1MWYSsuHkCpRDih3KWWRb4WtcFuKVZc0sMEczi5JYO2FU8V1B5hXJoVCBROgJWu4b/yHbL7mI/ZzlTwg7w8pC/JcRLIHCaQA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(39860400002)(346002)(396003)(376002)(451199021)(36840700001)(46966006)(40470700004)(54906003)(40460700003)(478600001)(40480700001)(8936002)(5660300002)(44832011)(8676002)(36756003)(86362001)(2906002)(70206006)(6916009)(81166007)(82740400003)(70586007)(316002)(82310400005)(356005)(4326008)(41300700001)(2616005)(1076003)(36860700001)(47076005)(26005)(966005)(83380400001)(186003)(336012)(426003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2023 03:07:28.9043 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ed1fadd7-69b4-44ef-2c03-08db6704540b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB5421 Handle phantom functions in iommu_add_dt_pci_sideband_ids(). Each phantom function will have a unique requestor ID (RID)/BDF. On ARM, we need to map/translate the RID/BDF to an AXI stream ID for each phantom function according to the pci-iommu device tree mapping [1]. The RID/BDF -> AXI stream ID mapping in DT could allow phantom devices (i.e. devices with phantom functions) to use different AXI stream IDs based on the (phantom) function. [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-iommu.txt Signed-off-by: Stewart Hildebrand --- v3->v4: * s/iommu_dt_pci_map_id/dt_map_id/ v2->v3: * new patch title (was: iommu/arm: iommu_add_dt_pci_device phantom handling) * rework loop to reduce duplication * s/iommu_fwspec_free(pci_to_dev(pdev))/iommu_fwspec_free(dev)/ v1->v2: * new patch --- xen/drivers/passthrough/device_tree.c | 33 ++++++++++++++++----------- 1 file changed, 20 insertions(+), 13 deletions(-) diff --git a/xen/drivers/passthrough/device_tree.c b/xen/drivers/passthrough/device_tree.c index bd0aed5df651..b7de0175ec7e 100644 --- a/xen/drivers/passthrough/device_tree.c +++ b/xen/drivers/passthrough/device_tree.c @@ -251,6 +251,7 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) struct device *dev = pci_to_dev(pdev); const struct dt_device_node *np; int rc = NO_IOMMU; + unsigned int devfn = pdev->devfn; if ( !iommu_enabled ) return NO_IOMMU; @@ -268,21 +269,27 @@ int iommu_add_dt_pci_sideband_ids(struct pci_dev *pdev) if ( !np ) return -ENODEV; - /* - * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt - * from Linux. - */ - rc = dt_map_id(np, PCI_BDF(pdev->bus, pdev->devfn), "iommu-map", - "iommu-map-mask", &iommu_spec.np, iommu_spec.args); - if ( rc ) - return (rc == -ENODEV) ? NO_IOMMU : rc; + do { + /* + * According to the Documentation/devicetree/bindings/pci/pci-iommu.txt + * from Linux. + */ + rc = dt_map_id(np, PCI_BDF(pdev->bus, devfn), "iommu-map", + "iommu-map-mask", &iommu_spec.np, iommu_spec.args); + if ( rc ) + return (rc == -ENODEV) ? NO_IOMMU : rc; - rc = iommu_dt_xlate(dev, &iommu_spec); - if ( rc < 0 ) - { - iommu_fwspec_free(dev); - return -EINVAL; + rc = iommu_dt_xlate(dev, &iommu_spec); + if ( rc < 0 ) + { + iommu_fwspec_free(dev); + return -EINVAL; + } + + devfn += pdev->phantom_stride; } + while ( (devfn != pdev->devfn) && + (PCI_SLOT(devfn) == PCI_SLOT(pdev->devfn)) ); return rc; }