From patchwork Thu Jun 8 13:59:12 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Luca Fancellu X-Patchwork-Id: 13272379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCC64C7EE37 for ; Thu, 8 Jun 2023 13:59:50 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.545300.851651 (Exim 4.92) (envelope-from ) id 1q7GAk-0001YV-4X; Thu, 08 Jun 2023 13:59:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 545300.851651; Thu, 08 Jun 2023 13:59:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q7GAk-0001YO-1R; Thu, 08 Jun 2023 13:59:30 +0000 Received: by outflank-mailman (input) for mailman id 545300; Thu, 08 Jun 2023 13:59:28 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1q7GAi-0001YD-2k for xen-devel@lists.xenproject.org; Thu, 08 Jun 2023 13:59:28 +0000 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by se1-gles-flk1.inumbo.com (Halon) with ESMTP id ac27c465-0604-11ee-8611-37d641c3527e; Thu, 08 Jun 2023 15:59:23 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5DE77AB6; Thu, 8 Jun 2023 07:00:08 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D5A413F6C4; Thu, 8 Jun 2023 06:59:21 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: ac27c465-0604-11ee-8611-37d641c3527e From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, wei.chen@arm.com, Wei Liu , Anthony PERARD , =?utf-8?q?Marek_Marczykowski-G?= =?utf-8?q?=C3=B3recki?= , Andrew Cooper Subject: [PATCH 1/2] tools: Fix ifdef for aarch64 that should include also arm Date: Thu, 8 Jun 2023 14:59:12 +0100 Message-Id: <20230608135913.560413-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Commit 56a7aaa16bfe introduced some SVE related code that is protected by '#if defined(__aarch64__)', the issue is that this doesn't take into consideration when the toolstack is compiled for an arm32 Dom0 running on an arm64 platform, it should be able to create SVE enabled guests but with the current code it's not. So fix the issue by compiling the code when the toolstack is compiled for both arm32 and arm64. Fixes: 56a7aaa16bfe ("tools: add physinfo arch_capabilities handling for Arm") Signed-off-by: Luca Fancellu Reported-by: Andrew Cooper Acked-by: Marek Marczykowski-Górecki Acked-by: Anthony PERARD --- tools/include/xen-tools/arm-arch-capabilities.h | 2 +- tools/python/xen/lowlevel/xc/xc.c | 2 +- tools/xl/xl_info.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/include/xen-tools/arm-arch-capabilities.h b/tools/include/xen-tools/arm-arch-capabilities.h index 3849e897925d..4aa4c6c34a99 100644 --- a/tools/include/xen-tools/arm-arch-capabilities.h +++ b/tools/include/xen-tools/arm-arch-capabilities.h @@ -14,7 +14,7 @@ static inline unsigned int arch_capabilities_arm_sve(unsigned int arch_capabilities) { -#if defined(__aarch64__) +#if defined(__arm__) || defined(__aarch64__) unsigned int sve_vl = MASK_EXTR(arch_capabilities, XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK); diff --git a/tools/python/xen/lowlevel/xc/xc.c b/tools/python/xen/lowlevel/xc/xc.c index 491e88977fd3..e14e223ec903 100644 --- a/tools/python/xen/lowlevel/xc/xc.c +++ b/tools/python/xen/lowlevel/xc/xc.c @@ -911,7 +911,7 @@ static PyObject *pyxc_physinfo(XcObject *self) "hw_caps", cpu_cap, "virt_caps", virt_caps); -#if defined(__aarch64__) +#if defined(__arm__) || defined(__aarch64__) if ( objret ) { unsigned int sve_vl_bits; PyObject *py_arm_sve_vl; diff --git a/tools/xl/xl_info.c b/tools/xl/xl_info.c index ddc42f96b979..72e87eac46d1 100644 --- a/tools/xl/xl_info.c +++ b/tools/xl/xl_info.c @@ -226,7 +226,7 @@ static void output_physinfo(void) ); /* Print arm SVE vector length only on ARM platforms */ -#if defined(__aarch64__) +#if defined(__arm__) || defined(__aarch64__) maybe_printf("arm_sve_vector_length : %u\n", arch_capabilities_arm_sve(info.arch_capabilities) );