From patchwork Mon Jun 19 17:01:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 13284836 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72B89EB64DB for ; Mon, 19 Jun 2023 17:01:37 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.551243.860690 (Exim 4.92) (envelope-from ) id 1qBIFn-0003fM-N4; Mon, 19 Jun 2023 17:01:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 551243.860690; Mon, 19 Jun 2023 17:01:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qBIFn-0003fD-Jy; Mon, 19 Jun 2023 17:01:23 +0000 Received: by outflank-mailman (input) for mailman id 551243; Mon, 19 Jun 2023 17:01:21 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qBIFl-0003PJ-SG for xen-devel@lists.xenproject.org; Mon, 19 Jun 2023 17:01:21 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qBIFl-0002e8-I0; Mon, 19 Jun 2023 17:01:21 +0000 Received: from 54-240-197-232.amazon.com ([54.240.197.232] helo=dev-dsk-jgrall-1b-035652ec.eu-west-1.amazon.com) by xenbits.xenproject.org with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.92) (envelope-from ) id 1qBIFl-00079R-AP; Mon, 19 Jun 2023 17:01:21 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From; bh=XCDJIqgFhmZ0JxJIz/CX3QdAY7V9+R7dcjMnAbPAVAE=; b=b7G86f2/m0YHDlxFFdfMktxZJS FuYmVBB/wK3s2CWthe5OwcpPFpnf6QsPtkDVNK5eW7hAjBWdSCsMq6Tpt/6tLCKvbGYW8eKB2rB1D 2ivqbwODXI6tEjaLVcaRFhYXb//cySMhPkad7kRm3RFV8TX2sUd+U0GrOHqYw8bJKg/o=; From: Julien Grall To: xen-devel@lists.xenproject.org Cc: Luca.Fancellu@arm.com, michal.orzel@amd.com, Henry.Wang@arm.com, Julien Grall , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH 2/7] xen/arm32: head: Add mising isb in switch_to_runtime_mapping() Date: Mon, 19 Jun 2023 18:01:10 +0100 Message-Id: <20230619170115.81398-3-julien@xen.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230619170115.81398-1-julien@xen.org> References: <20230619170115.81398-1-julien@xen.org> MIME-Version: 1.0 From: Julien Grall Per the Arm Arm (ARM DDI 0406C.d A3.8.3): "The DMB and DSB memory barriers affect reads and writes to the memory system generated by load/store instructions and data or unified cache maintenance operations being executed by the processor. Instruction fetches or accesses caused by a hardware translation table access are not explicit accesses." The function switch_to_runtime_mapping() is responsible to map the Xen at its runtime address if we were using the temporary area before jumping returning using a runtime address. So we need to ensure the 'dsb' has completed before continuing. Therefore add an 'isb'. Fixes: fbd9b5fb4c26 ("xen/arm32: head: Remove restriction where to load Xen") Signed-off-by: Julien Grall Reviewed-by: Henry Wang Tested-by: Henry Wang Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis --- xen/arch/arm/arm32/head.S | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 6ca3329138e3..b942e7e54d08 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -656,6 +656,11 @@ switch_to_runtime_mapping: /* Ensure any page table updates are visible before continuing */ dsb nsh + /* + * The function will return on the runtime mapping. So we want + * to prevent instruction fetch before the dsb completes. + */ + isb ready_to_switch: mov pc, lr