@@ -556,8 +556,8 @@ static int cf_check init_bars(struct pci_dev *pdev)
if ( rc )
return rc;
- rc = vpci_add_rw1c_register(pdev->vpci, status_read, vpci_hw_write16,
- PCI_STATUS, 2, header, 0xF900);
+ rc = vpci_add_register_mask(pdev->vpci, status_read, vpci_hw_write16,
+ PCI_STATUS, 2, header, 0x06F8, 0xF900);
if ( rc )
return rc;
@@ -29,6 +29,7 @@ struct vpci_register {
unsigned int offset;
void *private;
struct list_head node;
+ uint32_t ro_mask;
uint32_t rw1c_mask;
};
@@ -154,7 +155,8 @@ void cf_check vpci_hw_write16(
static int add_register(struct vpci *vpci, vpci_read_t *read_handler,
vpci_write_t *write_handler, unsigned int offset,
- unsigned int size, void *data, uint32_t rw1c_mask)
+ unsigned int size, void *data, uint32_t ro_mask,
+ uint32_t rw1c_mask)
{
struct list_head *prev;
struct vpci_register *r;
@@ -174,6 +176,7 @@ static int add_register(struct vpci *vpci, vpci_read_t *read_handler,
r->size = size;
r->offset = offset;
r->private = data;
+ r->ro_mask = ro_mask;
r->rw1c_mask = rw1c_mask;
spin_lock(&vpci->lock);
@@ -206,15 +209,16 @@ int vpci_add_register(struct vpci *vpci, vpci_read_t *read_handler,
unsigned int size, void *data)
{
return add_register(vpci, read_handler, write_handler, offset, size, data,
- 0);
+ 0, 0);
}
-int vpci_add_rw1c_register(struct vpci *vpci, vpci_read_t *read_handler,
+int vpci_add_register_mask(struct vpci *vpci, vpci_read_t *read_handler,
vpci_write_t *write_handler, unsigned int offset,
- unsigned int size, void *data, uint32_t rw1c_mask)
+ unsigned int size, void *data, uint32_t ro_mask,
+ uint32_t rw1c_mask)
{
return add_register(vpci, read_handler, write_handler, offset, size, data,
- rw1c_mask);
+ ro_mask, rw1c_mask);
}
int vpci_remove_register(struct vpci *vpci, unsigned int offset,
@@ -447,6 +451,7 @@ static void vpci_write_helper(const struct pci_dev *pdev,
data = merge_result(val, data, size, offset);
}
+ data &= ~r->ro_mask;
r->write(pdev, r->offset, data & (0xffffffffU >> (32 - 8 * r->size)),
r->private);
}
@@ -37,11 +37,12 @@ int __must_check vpci_add_register(struct vpci *vpci,
vpci_write_t *write_handler,
unsigned int offset, unsigned int size,
void *data);
-int __must_check vpci_add_rw1c_register(struct vpci *vpci,
+int __must_check vpci_add_register_mask(struct vpci *vpci,
vpci_read_t *read_handler,
vpci_write_t *write_handler,
unsigned int offset, unsigned int size,
- void *data, uint32_t rw1c_mask);
+ void *data, uint32_t ro_mask,
+ uint32_t rw1c_mask);
int __must_check vpci_remove_register(struct vpci *vpci, unsigned int offset,
unsigned int size);
Add support for a read-only bit mask for vPCI register handlers. Signed-off-by: Stewart Hildebrand <stewart.hildebrand@amd.com> --- v3->v4: * new patch RFC: It seemed like a low-hanging fruit to add support for ro mask. Let me know what you think, and I could squash it into the status handler patch for the next version of the series. --- xen/drivers/vpci/header.c | 4 ++-- xen/drivers/vpci/vpci.c | 15 ++++++++++----- xen/include/xen/vpci.h | 5 +++-- 3 files changed, 15 insertions(+), 9 deletions(-)