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bh=ZGX5Hj5sdF72tVBTXUh0R/Xrx3cM3xMJ6mAZRIdjtqc=; b=YwB6nf1L8l/1352pdfJp0dFTsUvmZePO9JK10zfwXu8ZUD5/xgYacVPEHyLOJaQOGDmxGkYH6mgfnyuL0HDpEnoPR83bQ/dfbS/5sCv21Yn2ratqQar+UPjcvdATCwmyobVICHXROUkqMu4AZDSO3hmpT2Zv+SOJiOdWORtJhgc= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Huang Rui To: Gerd Hoffmann , "Michael S . Tsirkin" , Stefano Stabellini , Anthony PERARD , Antonio Caggiano , "Dr . David Alan Gilbert" , Robert Beckett , "Dmitry Osipenko" , =?utf-8?q?Alex_Benn?= =?utf-8?q?=C3=A9e?= , CC: , Gurchetan Singh , , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki , Alyssa Ross , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Alex Deucher , =?utf-8?q?Christian_K=C3=B6nig?= , Xenia Ragiadakou , Pierre-Eric Pelloux-Prayer , "Honglei Huang" , Julia Zhang , "Chen Jiqian" , Huang Rui Subject: [QEMU PATCH v4 01/13] virtio: Add shared memory capability Date: Thu, 31 Aug 2023 17:32:40 +0800 Message-ID: <20230831093252.2461282-2-ray.huang@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230831093252.2461282-1-ray.huang@amd.com> References: <20230831093252.2461282-1-ray.huang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000989EA:EE_|MN0PR12MB5761:EE_ X-MS-Office365-Filtering-Correlation-Id: 8f1e4510-23d3-42e9-bc73-08dbaa0552e3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4obXY5+hFRwRqvExNyC5HwgCjx0eSObM6qV/CZ7GchSa8bNK6BGodp8X5m1r360kw6F9in3PSqmae2ndUZqlGOostOfbSWYSIkvHk5MFZrOqXr7wp+9jt2fKS6GsIAmX2tI0PSvK0MWVtBy0DEgBR/mbA93LNPYwJioP8ryt4g/fdGMqJxJG5JTz5VL86McgQ5Bw8AdH38DUg0cYF6k9RBJvDaN6DKl/QXnLR2AkkwXgH4qbslZOcN1qQ01XXjsoezt7V7CJZaboSwP1fYQzJgPTGHtGnlPUqnwzMo0lxU1tCw7UE/2NltFlVbhmofOfKRhZLOiPDnm7dDrs1TwNuSIc2V147oi8FrG9RAbX2uYfnlKXXDZ2qsdtPEzVp/38470mQ9/0CtckgD4PJ0vXn3Ld+4vWA5r/kYGBqd+qMTXMOYkyvQIa3pLPyBKMi/DsnJFCBndopO13VjStUetrvavkoDnlgJAAn/SH9nFu5jn0VS5AGReO9lNs/R/lZjY02M2asZ88TNA1A12Pos+UCFdp2WS9naGIPdj8P73MRXbCwOAsDhzSSs1vxWDeM48XES0wpMMLhTRoPcWWvWcyaq4EcG+hFTsvD734HMLsZGIXs1+XXCwDXdMoh4UESZBEWUaONWINdp5Fv1btY2JQFbTSma2Ufe/3ji5AL3iUmpja89yUWR4GSndLZKncbM4A2QyX4/U/4N2TFHaSxqM+yZP3/Al6MXRoCoXeM7XIHA8r5GozC5VYbQxdp9Qo3LFq3/QJvTFAR/Up88wrTzohg7IHccdpNjyCQyG5WcIfmSFSIC5Glahmq/CvT0PHm+OoLFKCqsNx7UCeY2R9qvmKXg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(376002)(346002)(396003)(136003)(186009)(82310400011)(1800799009)(451199024)(46966006)(40470700004)(36840700001)(70206006)(41300700001)(8936002)(40480700001)(47076005)(36860700001)(336012)(8676002)(4326008)(478600001)(6666004)(110136005)(70586007)(316002)(16526019)(2616005)(426003)(1076003)(54906003)(7696005)(26005)(2906002)(82740400003)(356005)(81166007)(921005)(5660300002)(40460700003)(7416002)(36756003)(86362001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 31 Aug 2023 09:33:24.3865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8f1e4510-23d3-42e9-bc73-08dbaa0552e3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000989EA.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5761 From: "Dr. David Alan Gilbert" Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG' to allow defining shared memory regions with sizes and offsets of 2^32 and more. Multiple instances of the capability are allowed and distinguished by a device-specific 'id'. Signed-off-by: Dr. David Alan Gilbert Signed-off-by: Antonio Caggiano Signed-off-by: Gurchetan Singh Tested-by: Alyssa Ross Tested-by: Huang Rui Tested-by: Akihiko Odaki Acked-by: Huang Rui Reviewed-by: Gurchetan Singh Reviewed-by: Akihiko Odaki Signed-off-by: Huang Rui --- This patch is already under review as part of the "rutabaga_gfx + gfxstream" series (already in v13) and has been included here because of dependency. hw/virtio/virtio-pci.c | 18 ++++++++++++++++++ include/hw/virtio/virtio-pci.h | 4 ++++ 2 files changed, 22 insertions(+) diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index edbc0daa18..da8c9ea12d 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1435,6 +1435,24 @@ static int virtio_pci_add_mem_cap(VirtIOPCIProxy *proxy, return offset; } +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, + uint8_t bar, uint64_t offset, uint64_t length, + uint8_t id) +{ + struct virtio_pci_cap64 cap = { + .cap.cap_len = sizeof cap, + .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG, + }; + + cap.cap.bar = bar; + cap.cap.length = cpu_to_le32(length); + cap.length_hi = cpu_to_le32(length >> 32); + cap.cap.offset = cpu_to_le32(offset); + cap.offset_hi = cpu_to_le32(offset >> 32); + cap.cap.id = id; + return virtio_pci_add_mem_cap(proxy, &cap.cap); +} + static uint64_t virtio_pci_common_read(void *opaque, hwaddr addr, unsigned size) { diff --git a/include/hw/virtio/virtio-pci.h b/include/hw/virtio/virtio-pci.h index ab2051b64b..5a3f182f99 100644 --- a/include/hw/virtio/virtio-pci.h +++ b/include/hw/virtio/virtio-pci.h @@ -264,4 +264,8 @@ unsigned virtio_pci_optimal_num_queues(unsigned fixed_queues); void virtio_pci_set_guest_notifier_fd_handler(VirtIODevice *vdev, VirtQueue *vq, int n, bool assign, bool with_irqfd); + +int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy, uint8_t bar, uint64_t offset, + uint64_t length, uint8_t id); + #endif