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b=c9yqxS4Tl6DWe3GO/inslCtsAAxHaLY4/mB5hRpQ6o69sYrNuFZbJ7lUQbSSri44xU/J9IqFtA1vHEOHTAboKU2+ewaoCq6twWQdKyo/9z+fVdqQUC2iZ4qldXt7gIlCZTiGzea2D4gK+lStECidHA41c5S9WrOyPZBDnU8HmHqHHMZ/kqnnop4i/kzTV6tUNRBjS/8OxVYuAHQrXNAcdQhx70jExeKb84RneNsdcQ4tExGp01d+85c7Z9z7otO9IQdMtAJ/vPro2a7Zpc3A8ieLrr7pvg25BU35EfIPcEj56HQbrmpFuNnxobSsiL6H2vGqJLO3/mBG2PVgY9fMRQ== From: Volodymyr Babchuk To: "xen-devel@lists.xenproject.org" CC: Stewart Hildebrand , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v1 2/3] ARM: GICv3 ITS: do not invalidate memory while sending a command Thread-Topic: [PATCH v1 2/3] ARM: GICv3 ITS: do not invalidate memory while sending a command Thread-Index: AQHZ6ux4LpE3chDIj0mOPudUv9951Q== Date: Tue, 19 Sep 2023 11:28:54 +0000 Message-ID: <20230919112827.1001484-3-volodymyr_babchuk@epam.com> References: <20230919112827.1001484-1-volodymyr_babchuk@epam.com> In-Reply-To: <20230919112827.1001484-1-volodymyr_babchuk@epam.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-mailer: git-send-email 2.42.0 x-ms-publictraffictype: Email x-ms-traffictypediagnostic: VI1PR03MB3710:EE_|AS8PR03MB10084:EE_ x-ms-office365-filtering-correlation-id: e72eac27-de73-4ec2-5afe-08dbb9039b2b x-ld-processed: b41b72d0-4e9f-4c26-8a69-f949f367c91d,ExtAddr x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0; 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Writing itself guarantees that cache entry is valid. But we still need to flush cache line to be sure that ITS sees a command written into a queue. Signed-off-by: Volodymyr Babchuk --- xen/arch/arm/gic-v3-its.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index a9c971a55f..72cf318810 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -108,8 +108,7 @@ static int its_send_command(struct host_its *hw_its, const void *its_cmd) memcpy(hw_its->cmd_buf + writep, its_cmd, ITS_CMD_SIZE); if ( hw_its->flags & HOST_ITS_FLUSH_CMD_QUEUE ) - clean_and_invalidate_dcache_va_range(hw_its->cmd_buf + writep, - ITS_CMD_SIZE); + clean_dcache_va_range(hw_its->cmd_buf + writep, ITS_CMD_SIZE); else dsb(ishst);