From patchwork Tue Oct 3 06:24:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 13406827 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2BA97E75433 for ; Tue, 3 Oct 2023 06:55:17 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.611906.951682 (Exim 4.92) (envelope-from ) id 1qnZJ9-0000cS-HC; Tue, 03 Oct 2023 06:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 611906.951682; Tue, 03 Oct 2023 06:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qnZJ8-0000Xi-LF; Tue, 03 Oct 2023 06:55:02 +0000 Received: by outflank-mailman (input) for mailman id 611906; Tue, 03 Oct 2023 06:54:53 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qnZIz-00047B-2C for xen-devel@lists.xenproject.org; Tue, 03 Oct 2023 06:54:53 +0000 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id bfb52fdb-61b9-11ee-9b0d-b553b5be7939; Tue, 03 Oct 2023 08:54:51 +0200 (CEST) Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Oct 2023 23:54:44 -0700 Received: from unknown (HELO fred..) ([172.25.112.68]) by fmsmga005.fm.intel.com with ESMTP; 02 Oct 2023 23:54:44 -0700 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: bfb52fdb-61b9-11ee-9b0d-b553b5be7939 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1696316091; x=1727852091; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=U5v5FfPZcbv+kEeu4BDXYc9n8fkslqM+14uJJDiLwkk=; b=Teo8HzN2KBDGzwjKVhitsOGQOb07xvXZFvgRIrmWO9uvFHaciAYWWK6S bttQu0acdifZvI/1kBXZw3Ebrz3TKWLjZQs0vmzqapX8BH0BT1gxPUnT6 lPBCHGKyiLTBkTd2cUWMwRZ4/bA8AMHpN8QczJHjZtO1WT6kzUGWYVHIj dkgzegiTOAzijNdhJw/Y+aLsKdw1olmNSsb22J2fXk4VwRhJRyUsl6Zan +VsMZI8A4glYRFOhiQewGTFQB9XIM8CQETkp7mr1xLjVKSBsRAC9cXS6d KRcyHg2lkVQQnHFhzAEN2E8IFHxS6G2p1tZ44GJZT1XTh13hZ878kcs47 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10851"; a="367858126" X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="367858126" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10851"; a="1081900954" X-IronPort-AV: E=Sophos;i="6.03,196,1694761200"; d="scan'208";a="1081900954" From: Xin Li To: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-hyperv@vger.kernel.org, kvm@vger.kernel.org, xen-devel@lists.xenproject.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, x86@kernel.org, hpa@zytor.com, luto@kernel.org, pbonzini@redhat.com, seanjc@google.com, peterz@infradead.org, jgross@suse.com, ravi.v.shankar@intel.com, mhiramat@kernel.org, andrew.cooper3@citrix.com, jiangshanlai@gmail.com, nik.borisov@suse.com Subject: [PATCH v12 19/37] x86/fred: Update MSR_IA32_FRED_RSP0 during task switch Date: Mon, 2 Oct 2023 23:24:40 -0700 Message-Id: <20231003062458.23552-20-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231003062458.23552-1-xin3.li@intel.com> References: <20231003062458.23552-1-xin3.li@intel.com> MIME-Version: 1.0 From: "H. Peter Anvin (Intel)" MSR_IA32_FRED_RSP0 is used during ring 3 event delivery, and needs to be updated to point to the top of next task stack during task switch. Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Xin Li --- arch/x86/include/asm/switch_to.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/include/asm/switch_to.h b/arch/x86/include/asm/switch_to.h index f42dbf17f52b..c3bd0c0758c9 100644 --- a/arch/x86/include/asm/switch_to.h +++ b/arch/x86/include/asm/switch_to.h @@ -70,9 +70,13 @@ static inline void update_task_stack(struct task_struct *task) #ifdef CONFIG_X86_32 this_cpu_write(cpu_tss_rw.x86_tss.sp1, task->thread.sp0); #else - /* Xen PV enters the kernel on the thread stack. */ - if (cpu_feature_enabled(X86_FEATURE_XENPV)) + if (cpu_feature_enabled(X86_FEATURE_FRED)) { + /* WRMSRNS is a baseline feature for FRED. */ + wrmsrns(MSR_IA32_FRED_RSP0, (unsigned long)task_stack_page(task) + THREAD_SIZE); + } else if (cpu_feature_enabled(X86_FEATURE_XENPV)) { + /* Xen PV enters the kernel on the thread stack. */ load_sp0(task_top_of_stack(task)); + } #endif }