@@ -299,7 +299,7 @@ static void *iommu_init(hwaddr addr, uint32_t version, qemu_irq irq)
static void *sparc32_dma_init(hwaddr dma_base,
hwaddr esp_base, qemu_irq espdma_irq,
- hwaddr le_base, qemu_irq ledma_irq, NICInfo *nd)
+ hwaddr le_base, qemu_irq ledma_irq)
{
DeviceState *dma;
ESPDMADeviceState *espdma;
@@ -320,7 +320,7 @@ static void *sparc32_dma_init(hwaddr dma_base,
lance = SYSBUS_PCNET(object_resolve_path_component(
OBJECT(ledma), "lance"));
- qdev_set_nic_properties(DEVICE(lance), nd);
+ qemu_configure_nic_device(DEVICE(lance), true, NULL);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dma), &error_fatal);
sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base);
@@ -832,7 +832,6 @@ static void sun4m_hw_init(MachineState *machine)
unsigned int smp_cpus = machine->smp.cpus;
unsigned int max_cpus = machine->smp.max_cpus;
HostMemoryBackend *ram_memdev = machine->memdev;
- NICInfo *nd = &nd_table[0];
if (machine->ram_size > hwdef->max_mem) {
error_report("Too much memory for this machine: %" PRId64 ","
@@ -893,10 +892,9 @@ static void sun4m_hw_init(MachineState *machine)
hwdef->iommu_pad_base, hwdef->iommu_pad_len);
}
- qemu_check_nic_model(nd, TYPE_LANCE);
sparc32_dma_init(hwdef->dma_base,
hwdef->esp_base, slavio_irq[18],
- hwdef->le_base, slavio_irq[16], nd);
+ hwdef->le_base, slavio_irq[16]);
if (graphic_depth != 8 && graphic_depth != 24) {
error_report("Unsupported depth: %d", graphic_depth);