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pr=C From: Ayan Kumar Halder To: CC: , , , , Ayan Kumar Halder Subject: [XEN] xen/arm: arm32: Use adr_l instead of load_paddr for getting address of symbols Date: Wed, 25 Oct 2023 18:03:04 +0100 Message-ID: <20231025170304.2331922-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE3A:EE_|SJ0PR12MB7082:EE_ X-MS-Office365-Filtering-Correlation-Id: 4384aa27-6df3-4e4e-c323-08dbd57c4a2b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 9rt82m8kHQe/UsDbPyyXFghDvsyrnpQPfBsNrg1u9rmJEBLsxlxRTbhsSszRp4rCoVJheJPKcOJI0vlEmI3wym8Vmql3XoiYnNDTyg+E4qkeSz1mfdL2ezARTNR6yFDFR1n1Bj/agaYcjxEJRvXUlt1rvGcL+f4WWEPsb4kz6LIJ6OI8vb1RHuW51XdAj//uyl43Tjwmki3JjnWE4F7JJ8q2feCX2v3xJYO1UhjAd4yyCG/U7gGaPBIlxodyAN5x86stVUofNJXxNqlZfFW/1ZzJZQw+4qX+yXYVHwOIusTG6nXbl20S5Z26GKL0jixN38Y2dj8xFoAtwsJM0PSDoQkp8xJL+tnc2Vi6T9V23ndqi1PAb51RFFh2UW+P/cUfL/6tXGM1HKKZLZRZLuzxToQKlrTNE9P1OUQ1S4E7bIq1paQf0Jf0voxPlpRIAVba4nhpCGjiPZ/JsktXAb9POe0JqH3aOocPYkZJj9joiOPiivZDRo470fBCsER46ummGiao2lvVts57ZtpbccmrGUoIDdFgkMOLGmDRxRMC2CDuV6rcXbWsnqf0q5z4QjaQq3kr2QJeDew5A6UQCUIo3prDVPvHBnrqsuvp8FgtAWGbECKrqadKM526QnRJK95jpw/iwi75uML3O0jiHni7ZWt9/p3AvrDH3ZZ54JkGq25HyC3Hw3w89/Qg9DCOT0gE2yt7zpJet4qd2wN2PzmHdoBRnA7TsqA45DsjJDGzNpZdj/ffSelTLbLse5bIoZ4qJbjY/kTjGPlv02LOEyz75A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(136003)(346002)(39860400002)(396003)(230922051799003)(186009)(64100799003)(1800799009)(82310400011)(451199024)(40470700004)(36840700001)(46966006)(40460700003)(2906002)(2616005)(426003)(316002)(1076003)(356005)(83380400001)(26005)(82740400003)(103116003)(86362001)(70206006)(6666004)(70586007)(478600001)(966005)(47076005)(336012)(81166007)(36860700001)(5660300002)(40480700001)(8676002)(41300700001)(54906003)(36756003)(8936002)(4326008)(6916009)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2023 17:03:19.9162 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4384aa27-6df3-4e4e-c323-08dbd57c4a2b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE3A.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7082 Before the MMU is turned on, the address returned for any symbol will always be physical address. Thus, one can use adr_l instead of load_paddr. create_table_entry() now takes an extra argument to denote if it is called after the mmu is turned on or not. If it is called with mmu on, then it uses load_paddr to get the physical address of the page table symbol. Signed-off-by: Ayan Kumar Halder --- Refer https://lists.archive.carbon60.com/xen/devel/682900 for details. xen/arch/arm/arm32/head.S | 35 ++++++++++++++++++++--------------- 1 file changed, 20 insertions(+), 15 deletions(-) diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S index 33b038e7e0..bf442b0434 100644 --- a/xen/arch/arm/arm32/head.S +++ b/xen/arch/arm/arm32/head.S @@ -171,7 +171,7 @@ past_zImage: /* Using the DTB in the .dtb section? */ .ifnes CONFIG_DTB_FILE,"" - load_paddr r8, _sdtb + adr_l r8, _sdtb .endif /* Initialize the UART if earlyprintk has been enabled. */ @@ -213,7 +213,7 @@ GLOBAL(init_secondary) mrc CP32(r1, MPIDR) bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */ - load_paddr r0, smp_up_cpu + adr_l r0, smp_up_cpu dsb 2: ldr r1, [r0] cmp r1, r7 @@ -406,6 +406,7 @@ ENDPROC(cpu_init) * tbl: table symbol to point to * virt: virtual address * lvl: page-table level + * mmu_on: is mmu on * * Preserves \virt * Clobbers r1 - r4 @@ -414,10 +415,14 @@ ENDPROC(cpu_init) * * Note that \virt should be in a register other than r1 - r4 */ -.macro create_table_entry, ptbl, tbl, virt, lvl +.macro create_table_entry, ptbl, tbl, virt, lvl, mmu_on + .if \mmu_on == 1 load_paddr r4, \tbl - create_table_entry_from_paddr \ptbl, r4, \virt, \lvl - .endm + .else + adr_l r4, \tbl + .endif + create_table_entry_from_paddr \ptbl, r4, \virt, \lvl +.endm /* * Macro to create a mapping entry in \tbl to \paddr. Only mapping in 3rd @@ -479,7 +484,7 @@ create_page_tables: * create_table_entry_paddr() will clobber the register storing * the physical address of the table to point to. */ - load_paddr r5, boot_third + adr_l r5, boot_third mov_w r4, XEN_VIRT_START .rept XEN_NR_ENTRIES(2) mov r0, r5 /* r0 := paddr(l3 table) */ @@ -522,8 +527,8 @@ create_page_tables: * Setup the 1:1 mapping so we can turn the MMU on. Note that * only the first page of Xen will be part of the 1:1 mapping. */ - create_table_entry boot_pgtable, boot_second_id, r9, 1 - create_table_entry boot_second_id, boot_third_id, r9, 2 + create_table_entry boot_pgtable, boot_second_id, r9, 1, 0 + create_table_entry boot_second_id, boot_third_id, r9, 2, 0 create_mapping_entry boot_third_id, r9, r9 /* @@ -537,7 +542,7 @@ create_page_tables: bne use_temporary_mapping mov_w r0, XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 + create_table_entry boot_pgtable, boot_second, r0, 1, 0 mov r12, #0 /* r12 := temporary mapping not created */ mov pc, lr @@ -551,7 +556,7 @@ use_temporary_mapping: /* Map boot_second (cover Xen mappings) to the temporary 1st slot */ mov_w r0, TEMPORARY_XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 + create_table_entry boot_pgtable, boot_second, r0, 1, 0 mov r12, #1 /* r12 := temporary mapping created */ mov pc, lr @@ -578,7 +583,7 @@ enable_mmu: flush_xen_tlb_local r0 /* Write Xen's PT's paddr into the HTTBR */ - load_paddr r0, boot_pgtable + adr_l r0, boot_pgtable mov r1, #0 /* r0:r1 is paddr (boot_pagetable) */ mcrr CP64(r0, r1, HTTBR) isb @@ -658,7 +663,7 @@ switch_to_runtime_mapping: /* Map boot_second into boot_pgtable */ mov_w r0, XEN_VIRT_START - create_table_entry boot_pgtable, boot_second, r0, 1 + create_table_entry boot_pgtable, boot_second, r0, 1, 1 /* Ensure any page table updates are visible before continuing */ dsb nsh @@ -739,7 +744,7 @@ setup_fixmap: #endif /* Map fixmap into boot_second */ mov_w r0, FIXMAP_ADDR(0) - create_table_entry boot_second, xen_fixmap, r0, 2 + create_table_entry boot_second, xen_fixmap, r0, 2, 0 /* Ensure any page table updates made above have occurred. */ dsb nshst /* @@ -897,8 +902,8 @@ ENTRY(lookup_processor_type) */ __lookup_processor_type: mrc CP32(r0, MIDR) /* r0 := our cpu id */ - load_paddr r1, __proc_info_start - load_paddr r2, __proc_info_end + adr_l r1, __proc_info_start + adr_l r2, __proc_info_end 1: ldr r3, [r1, #PROCINFO_cpu_mask] and r4, r0, r3 /* r4 := our cpu id with mask */ ldr r3, [r1, #PROCINFO_cpu_val] /* r3 := cpu val in current proc info */