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d="scan'208";a="127580573" From: Andrew Cooper To: Xen-devel CC: Andrew Cooper , George Dunlap , Jan Beulich , "Stefano Stabellini" , Wei Liu , Julien Grall , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Henry Wang Subject: [PATCH for-4.18 2/3] CHANGELOG: More 4.18 content Date: Tue, 31 Oct 2023 13:19:53 +0000 Message-ID: <20231031131954.3310725-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231031131954.3310725-1-andrew.cooper3@citrix.com> References: <20231031131954.3310725-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Signed-off-by: Andrew Cooper Acked-by: Henry Wang --- CC: George Dunlap CC: Jan Beulich CC: Stefano Stabellini CC: Wei Liu CC: Julien Grall CC: Roger Pau Monné CC: Henry Wang --- CHANGELOG.md | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index edc0d69898ed..a827054cf27d 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -18,10 +18,17 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) ### Added - On x86: + - On all Intel systems, MSR_ARCH_CAPS is now visible in guests, and + controllable from the VM's config file. For CPUs from ~2019 onwards, + this allows guest kernels to see details about hardware fixes for + speculative mitigations. (Backported as XSA-435 to older releases). - xl/libxl can customize SMBIOS strings for HVM guests. - Support for enforcing system-wide operation in Data Operand Independent Timing Mode. - Add Intel Hardware P-States (HWP) cpufreq driver. + - Support for features new in AMD Genoa CPUs: + - CPUID_USER_DIS (CPUID Faulting) used by Xen to control PV guest's view + of CPUID data. - Support for features new in Intel Sapphire Rapids CPUs: - PKS (Protection Key Supervisor) available to HVM/PVH guests. - VM-Notify used by Xen to mitigate certain micro-architectural pipeline