Message ID | 20231109182716.367119-2-stewart.hildebrand@amd.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | SMMU handling for PCIe Passthrough on ARM | expand |
Hi, On 09/11/2023 18:27, Stewart Hildebrand wrote: > A device tree node for a PCIe root controller may have an iommu-map property [1] > with a phandle reference to the SMMU node, but not necessarily an iommus > property. In this case, we want to treat it the same as we currently handle > devices with an iommus property: don't pass the iommu related properties to > hwdom. > > [1] https://www.kernel.org/doc/Documentation/devicetree/bindings/pci/pci-iommu.txt > > Reported-by: Michal Orzel <michal.orzel@amd.com> > Signed-off-by: Stewart Hildebrand <stewart.hildebrand@amd.com> > Acked-by: Julien Grall <jgrall@amazon.com> I was committed this patch. The rest doesn't seem to be reviewed or have some dependencies. Cheers,
diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 49792dd590ee..ca7d0f5ffde5 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1135,6 +1135,8 @@ static int __init write_properties(struct domain *d, struct kernel_info *kinfo, * should be skipped. */ iommu_node = dt_parse_phandle(node, "iommus", 0); + if ( !iommu_node ) + iommu_node = dt_parse_phandle(node, "iommu-map", 1); if ( iommu_node && device_get_class(iommu_node) != DEVICE_IOMMU ) iommu_node = NULL;