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pr=C From: Stewart Hildebrand To: CC: Stewart Hildebrand , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" Subject: [PATCH v6 3/5] [FUTURE] xen/arm: enable vPCI for dom0 Date: Mon, 13 Nov 2023 17:21:12 -0500 Message-ID: <20231113222118.825758-4-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231113222118.825758-1-stewart.hildebrand@amd.com> References: <20231113222118.825758-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB78:EE_|IA1PR12MB7494:EE_ X-MS-Office365-Filtering-Correlation-Id: e1e1d82e-cff6-4561-b88f-08dbe4970301 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ArcVTITX0lOv9BuQP/9BFnA1HX7ts/MaOZu9ib4MxwSsxNDCdoXDnR4+mAGOHdjbd3H3p9NPgXB2A9qo17pWZIGqZRkuphHZSNLx69kMIxbB/IKCVUbNEVMelkZ6plmeYSF18Fhyr2ARinCYODGtlLlHwYNwDOXEAeQ55uQqd7ObEy+EhXGuxEdmRBfUt+Qe41/jPVX6eKDyClPdlbDzC7dPHBhijkvb3H+aF+30FsJ7FJVgfEE2Tnr9OqOKW8A/cD8nqk+tKPIfJuAbJKv4y37TqfQV1zpsFFDhenbSlrMhOnjo7wJH/h032lwJGd91zgXqEqn13fQqjXwwVi6F6/u1egzPZb0ha12vPiT5jWBaMROyY2rVZ7gRYEm4TccKUGSbdaGpxVnvhoddX1nGuIhPARsFZc5Id9bz7dMXufb941iW2G51W2M6T1yv1ukRoFGA7Ng2WfeR8OjK77taHtm7dmgFOflh6ybLkcnyZ8XlHrp8++uA/RwkkS6iiAW5V+wlp5NDiMETdIIAZ15AY+/RnxI8CF5zMjseSjVWAX3z8xAbWHe9qg7vOBSKNYnNslIKRMm68JC+9MG3hekHKiGrm6fu8nKzp//4PDSf9s94zmKJbc7kWuIbuQaT/CUJZSfkEArcdpb1mzRyBEpwW5QViATUz+rdiYvxlvbfA78LiayEVKbinlfDTtamxyqAcuRaRhNn1sByHBV/JFo1dkN84F2okZrZtvUBRICmhVgdLLh3N//xcHHxdy1DOK7oVgWlIKdtddGFbS6lgEXVLQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(346002)(396003)(136003)(376002)(230922051799003)(82310400011)(186009)(1800799009)(451199024)(64100799003)(36840700001)(46966006)(40470700004)(966005)(478600001)(81166007)(6666004)(36756003)(356005)(336012)(426003)(47076005)(6916009)(316002)(70586007)(70206006)(54906003)(41300700001)(40480700001)(83380400001)(44832011)(4326008)(8676002)(8936002)(40460700003)(5660300002)(2616005)(82740400003)(86362001)(2906002)(36860700001)(26005)(1076003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Nov 2023 22:22:24.4227 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e1e1d82e-cff6-4561-b88f-08dbe4970301 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB78.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7494 Set the vPCI flag in xen_domctl_createdomain to enable vPCI for dom0 if iommu and PCI passthrough are enabled and there exists a PCI host bridge in the system. Adjust pci_host_iterate_bridges_and_count() to count the number of host bridges if no callback is provided. Signed-off-by: Stewart Hildebrand --- Allowing/enabling vPCI for dom0 on ARM should follow or be part of the PCI passthrough SMMU series [1]. I'm including it here due to prerequisites in this Kconfig series. Once the prerequisites are committed I'll move this patch to the PCI passthrough SMMU series. v5->v6: * no change v4->v5: * add [FUTURE] tag * move flags_optional change from the previous patch to here v3->v4: * depend on iommu_enabled, pci_passthrough_enabled, and whether there is a pci host bridge v2->v3: * new patch [1] https://lists.xenproject.org/archives/html/xen-devel/2023-10/msg00210.html --- xen/arch/arm/domain.c | 3 ++- xen/arch/arm/domain_build.c | 6 ++++++ xen/arch/arm/include/asm/pci.h | 9 +++++++++ xen/arch/arm/pci/pci-host-common.c | 11 ++++++++--- 4 files changed, 25 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 28e3aaa5e482..1409a4235e13 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -607,7 +607,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { unsigned int max_vcpus; unsigned int flags_required = (XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap); - unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu); + unsigned int flags_optional = (XEN_DOMCTL_CDF_iommu | XEN_DOMCTL_CDF_vpmu | + XEN_DOMCTL_CDF_vpci); unsigned int sve_vl_bits = sve_decode_vl(config->arch.sve_vl); if ( (config->flags & ~flags_optional) != flags_required ) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 2dd2926b4144..512b3c4c76e2 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -3916,6 +3916,12 @@ void __init create_dom0(void) panic("SVE vector length error\n"); } + if ( IS_ENABLED(CONFIG_HAS_VPCI) && + iommu_enabled && + is_pci_passthrough_enabled() && + (pci_host_iterate_bridges_and_count(NULL, NULL) > 0) ) + dom0_cfg.flags |= XEN_DOMCTL_CDF_vpci; + dom0 = domain_create(0, &dom0_cfg, CDF_privileged | CDF_directmap); if ( IS_ERR(dom0) ) panic("Error creating domain 0 (rc = %ld)\n", PTR_ERR(dom0)); diff --git a/xen/arch/arm/include/asm/pci.h b/xen/arch/arm/include/asm/pci.h index 7f77226c9bbf..74816a687bbb 100644 --- a/xen/arch/arm/include/asm/pci.h +++ b/xen/arch/arm/include/asm/pci.h @@ -147,5 +147,14 @@ static inline int pci_get_new_domain_nr(void) return -1; } +struct pci_host_bridge; + +static inline int pci_host_iterate_bridges_and_count( + struct domain *d, + int (*cb)(struct domain *d, struct pci_host_bridge *bridge)) +{ + return 0; +} + #endif /*!CONFIG_HAS_PCI*/ #endif /* __ARM_PCI_H__ */ diff --git a/xen/arch/arm/pci/pci-host-common.c b/xen/arch/arm/pci/pci-host-common.c index c0faf0f43675..e6a03ae668f8 100644 --- a/xen/arch/arm/pci/pci-host-common.c +++ b/xen/arch/arm/pci/pci-host-common.c @@ -319,9 +319,14 @@ int pci_host_iterate_bridges_and_count(struct domain *d, { int ret; - ret = cb(d, bridge); - if ( ret < 0 ) - return ret; + if ( cb ) + { + ret = cb(d, bridge); + if ( ret < 0 ) + return ret; + } + else + ret = 1; count += ret; } return count;