From patchwork Thu Nov 30 14:41:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 13474554 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 609F7C10DAA for ; Thu, 30 Nov 2023 14:39:22 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.644769.1006280 (Exim 4.92) (envelope-from ) id 1r8iC7-0003P4-0h; Thu, 30 Nov 2023 14:39:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 644769.1006280; Thu, 30 Nov 2023 14:39:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1r8iC6-0003Mx-MT; Thu, 30 Nov 2023 14:39:10 +0000 Received: by outflank-mailman (input) for mailman id 644769; Thu, 30 Nov 2023 14:32:39 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1r8i5n-0007mE-Hl for xen-devel@lists.xenproject.org; Thu, 30 Nov 2023 14:32:39 +0000 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.43]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 4f65e906-8f8d-11ee-98e4-6d05b1d4d9a1; Thu, 30 Nov 2023 15:32:38 +0100 (CET) Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Nov 2023 06:32:26 -0800 Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.36]) by orsmga005.jf.intel.com with ESMTP; 30 Nov 2023 06:32:17 -0800 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 4f65e906-8f8d-11ee-98e4-6d05b1d4d9a1 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701354758; x=1732890758; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=giqm05kbC3tYOPrffoLra7vHI+bWgR59/qNt+YCSQ+8=; b=ViFxnAcDWpIlpeMhzKZKSxbwWJywdFVR8P+1d2i+GxXK/uup6sfcmjSF CqNwne7/GJIiDp3rtuT4kqbXg87y2fAe8pbPDBia5JGTy1rvWTkTz7Bao YqO9514T7X/ohXJAAUmpb6iXZNaLroEMAG69JhOKXp9cJQCDIwfGN206H NKMsx6BidAh8nxrN4hxp9gqmn7cLORvTidvjPg+6+tiv8cJXlPhatWr/P cHMTNwZXgrohSG8K56+fir2vEzGWOw1UzUctvds9u3x/aEr31bhzJId4I X+AzrV+v1hqN1rmpYXQAWikwv53I55lY1L7jPEppuNb9XF8t227J3e3s9 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="479531669" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="479531669" X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10910"; a="942729853" X-IronPort-AV: E=Sophos;i="6.04,239,1695711600"; d="scan'208";a="942729853" From: Zhao Liu To: Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= , Eduardo Habkost , Marcel Apfelbaum , Yanan Wang , Richard Henderson , "Michael S . Tsirkin" , Jason Wang , Nicholas Piggin , Daniel Henrique Barboza , Igor Mammedov , =?utf-8?q?C=C3=A9dric_Le_Goater?= , =?utf-8?b?RnLDqWTDqXJp?= =?utf-8?b?YyBCYXJyYXQ=?= , David Gibson , Harsh Prateek Bora , Stefano Stabellini , Anthony Perard , Paul Durrant , Gerd Hoffmann , Peter Maydell , Alistair Francis , "Edgar E . Iglesias" , =?utf-8?q?Daniel_P_=2E_Ber?= =?utf-8?q?rang=C3=A9?= , Bin Meng , Palmer Dabbelt , Weiwei Li , Liu Zhiwei , qemu-devel@nongnu.org, kvm@vger.kernel.org, qemu-ppc@nongnu.org, xen-devel@lists.xenproject.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, qemu-s390x@nongnu.org Cc: Nina Schoetterl-Glausch , Thomas Huth , Zhiyuan Lv , Zhenyu Wang , Yongwei Ma , Zhao Liu Subject: [RFC 12/41] hw/core/topo: Add helpers to traverse the CPU topology tree Date: Thu, 30 Nov 2023 22:41:34 +0800 Message-Id: <20231130144203.2307629-13-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> References: <20231130144203.2307629-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 From: Zhao Liu The topology devices will be organized as a topology tree. Each topology device may have many topology children with lower topology level. Add the helpers to traverse the CPU topology tree. Signed-off-by: Zhao Liu --- hw/core/cpu-topo.c | 41 ++++++++++++++++++++++++++++++++++++++ include/hw/core/cpu-topo.h | 13 ++++++++++++ 2 files changed, 54 insertions(+) diff --git a/hw/core/cpu-topo.c b/hw/core/cpu-topo.c index cba2dc747e74..687a4cc566ec 100644 --- a/hw/core/cpu-topo.c +++ b/hw/core/cpu-topo.c @@ -318,3 +318,44 @@ static void cpu_topo_register_types(void) } type_init(cpu_topo_register_types) + +static int do_cpu_topo_child_foreach(CPUTopoState *topo, + unsigned long *levels, + topo_fn fn, void *opaque, + bool recurse) +{ + CPUTopoState *child; + int ret = TOPO_FOREACH_CONTINUE; + + QTAILQ_FOREACH(child, &topo->children, sibling) { + if (!levels || (levels && test_bit(CPU_TOPO_LEVEL(child), levels))) { + ret = fn(child, opaque); + if (ret == TOPO_FOREACH_END || ret == TOPO_FOREACH_ERR) { + break; + } else if (ret == TOPO_FOREACH_SIBLING) { + continue; + } + } + + if (recurse) { + ret = do_cpu_topo_child_foreach(child, levels, fn, opaque, recurse); + if (ret != TOPO_FOREACH_CONTINUE) { + break; + } + } + } + return ret; +} + +int cpu_topo_child_foreach(CPUTopoState *topo, unsigned long *levels, + topo_fn fn, void *opaque) +{ + return do_cpu_topo_child_foreach(topo, levels, fn, opaque, false); +} + +int cpu_topo_child_foreach_recursive(CPUTopoState *topo, + unsigned long *levels, + topo_fn fn, void *opaque) +{ + return do_cpu_topo_child_foreach(topo, levels, fn, opaque, true); +} diff --git a/include/hw/core/cpu-topo.h b/include/hw/core/cpu-topo.h index 1ffdb0be6d38..453bacbb558b 100644 --- a/include/hw/core/cpu-topo.h +++ b/include/hw/core/cpu-topo.h @@ -90,4 +90,17 @@ struct CPUTopoState { #define CPU_TOPO_LEVEL(topo) (CPU_TOPO_GET_CLASS(topo)->level) +#define TOPO_FOREACH_SIBLING 2 +#define TOPO_FOREACH_END 1 +#define TOPO_FOREACH_CONTINUE 0 +#define TOPO_FOREACH_ERR -1 + +typedef int (*topo_fn)(CPUTopoState *topo, void *opaque); + +int cpu_topo_child_foreach(CPUTopoState *topo, unsigned long *levels, + topo_fn fn, void *opaque); +int cpu_topo_child_foreach_recursive(CPUTopoState *topo, + unsigned long *levels, + topo_fn fn, void *opaque); + #endif /* CPU_TOPO_H */