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bh=jjpP9b3zdAapc7bFnAf9Yxc26I+r5JBx8/ouifmxHE0=; b=tUo6/jvg4+b8GQNOPcU0uyR6bysLNm/ngznSrU93nLv2YFJuPbDpRYh1sY3dUdpDvvy0u0Qagy5YDFjpV+mQzpLm0mOJzJ071Sl6/rKquxxY5nA8sUNsxbElvKdUIrNcpLMVPDz3+2CqUdHzJk9S04Wou8WWXADrzCx98UEYTTU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Jiqian Chen To: Jan Beulich , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , "Daniel P . Smith" , Wei Liu , Anthony PERARD , "Juergen Gross" , Stefano Stabellini , CC: Stewart Hildebrand , Alex Deucher , Xenia Ragiadakou , Stefano Stabellini , Huang Rui , Honglei Huang , Julia Zhang , Jiqian Chen , Huang Rui Subject: [RFC XEN PATCH v3 2/3] x86/pvh: Add (un)map_pirq and setup_gsi for PVH dom0 Date: Mon, 11 Dec 2023 00:40:08 +0800 Message-ID: <20231210164009.1551147-3-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231210164009.1551147-1-Jiqian.Chen@amd.com> References: <20231210164009.1551147-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CC:EE_|CY5PR12MB6180:EE_ X-MS-Office365-Filtering-Correlation-Id: 89ccbc9d-b50c-4dca-3908-08dbf99ebc8d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: OETyUUkechQu1WlULDuDfcPaYtmaBz8/5yprSVaO515+2y3zobN4O/aQeVg4LPUpl9NxVM8cX9l/5grkhG+AQLzLQFcxGSt1npBXEKzVi24RUV0UOP/IeHm1821GTqQdLV4QHjjQbfLWXNqEoqCFhbAQ0yS8kLgKokcOMkxDipxcdrJscD8rQRbfmfA5hZnIv6wP3dGDUucFT0t7OxVZ19rIL7ldfqsB7d9gNGLQ0+2GtZ5ocmBoDEE9Yu4Z/xck4ZckwWvfqURB4l6xoeCYhwrPDGd5ZB67f9dDYTouNC1et0tpymVPYY465WOokwdDVeR/xhww5Lvoa6MooPeqjw9XG08XFxZtjEIJtwnk6nQv5hZgZNGB5wJF5eRYQVgZy9HrtIsYpUtGSymw7UcmfUE2B1B8boIoO03uRxkeW6t2OSGDxYvdbOW4LibihJQJH1+HKmBfsxCmuHQrQXVpKAQqSg6RA7DfIpNjOOR1EaozEkbXK8SjpV7l3mNjkJ+pKrX4D9cMA86mbgbMTEKyaAkfaMHg/9nPvmKNaFxRL16IxmxzNTwK8rzgFCP7oh6tweVPZ+60B7Ye3gn9G/6OjmZpUNw7MkZ0EkfWn+fzVlgk9s+8xdBJqSvw4mF8TliKT8xUYjEiI8VAg0ThPIuai9DhhKPMBuB2yzfknBpq2sU6vBN1jdZ9TipvE2KCUl3vWh5aZlGbESL5dg1XM7tQ9AFcBj34ynbAr/QVI8UUeFblrntDhGddcb4zrgVre4v9iLgWiJhCYwAQDdHFV/+0bA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(136003)(376002)(396003)(39860400002)(230922051799003)(1800799012)(186009)(64100799003)(82310400011)(451199024)(46966006)(40470700004)(36840700001)(478600001)(7696005)(16526019)(2616005)(6666004)(26005)(70586007)(70206006)(336012)(83380400001)(110136005)(8936002)(4326008)(2906002)(47076005)(8676002)(426003)(316002)(54906003)(36860700001)(5660300002)(86362001)(81166007)(40480700001)(356005)(82740400003)(41300700001)(36756003)(1076003)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Dec 2023 16:40:36.5952 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89ccbc9d-b50c-4dca-3908-08dbf99ebc8d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CC.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY5PR12MB6180 If run Xen with PVH dom0 and hvm domU, hvm will map a pirq for a passthrough device by using gsi, see xen_pt_realize->xc_physdev_map_pirq and pci_add_dm_done->xc_physdev_map_pirq. Then xc_physdev_map_pirq will call into Xen, but in hvm_physdev_op, PHYSDEVOP_map_pirq is not allowed because currd is PVH dom0 and PVH has no X86_EMU_USE_PIRQ flag, it will fail at has_pirq check. So, allow PHYSDEVOP_map_pirq when currd is dom0 no matter if dom0 has X86_EMU_USE_PIRQ flag and also allow PHYSDEVOP_unmap_pirq for the failed path to unmap pirq. What's more, in PVH dom0, the gsis don't get registered, but the gsi of a passthrough device must be configured for it to be able to be mapped into a hvm domU. So, add PHYSDEVOP_setup_gsi for PVH dom0, because PVH dom0 will setup gsi during assigning a device to passthrough. Co-developed-by: Huang Rui Signed-off-by: Jiqian Chen --- xen/arch/x86/hvm/hypercall.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 6ad5b4d5f1..621d789bd3 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -72,8 +72,11 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) switch ( cmd ) { + case PHYSDEVOP_setup_gsi: case PHYSDEVOP_map_pirq: case PHYSDEVOP_unmap_pirq: + if ( is_hardware_domain(currd) ) + break; case PHYSDEVOP_eoi: case PHYSDEVOP_irq_status_query: case PHYSDEVOP_get_free_pirq: