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pr=C From: Stewart Hildebrand To: CC: Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , "Volodymyr Babchuk" , Stewart Hildebrand Subject: [PATCH v12 15/15] arm/vpci: honor access size when returning an error Date: Tue, 9 Jan 2024 16:51:30 -0500 Message-ID: <20240109215145.430207-16-stewart.hildebrand@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240109215145.430207-1-stewart.hildebrand@amd.com> References: <20240109215145.430207-1-stewart.hildebrand@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE6:EE_|CH2PR12MB4326:EE_ X-MS-Office365-Filtering-Correlation-Id: c3589657-cb2f-479a-79fd-08dc115daca5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: uTbryQmsQTZ2QgQasnldQSiBljJxmtfvG+q11RceWgGOjMTONsZZ39mm3ZL7uxXO8A319HprVvDtYB34R6Bgcg1f0YcFTBs+p+RCuVKfHuZ/hvBFOeIPv4pdKQqkvNdiv4OuSBqsoz3+DoQs+Sg91cRMOTw+K1P6XbFt5GENXbt53QEdLOyvl8SYYqnTgORiPqW9MJqbm9gq1+cs8k/z//ufVtB96icdJ2VWQRVqDJyOpE2OR9kih5NQuC4CEAOObZ2ivvncVbrH6kJ2KiAgsRWKC64Iluwr8Fo5ozPfWq0G2blQuWW8/6Ohj2d3uQlKnMRd4hievrFVmn593sdcfz0fgdkWiy8sOPdelXDujBUiVwdxans2a5iY+A+jnWiR+qf/P4GUmq8XKptYj/c599vIShHBWR05YiKWF8kj0bvq5ftYvDODJN23vC58RCiASx6fB05q5wrDZ5sA4W3xv1gJWnXopreocob4nXfXyzjKVVml2lMukWW2DpVqy+ozMZ2up3G8H100VPocofpu1Arb1X33lS1TgmnWMeZe++9gKdRuwSzvqGEUDF/eF7vO0TtvqlXvtD//8HLGICJGkF7IzNa9KrBpQ1oFNdM4VwbkQeODAVgTbsxbYN8g4t3nuBSUOxfrL+itVE8WkCVmMsaIw/oK0kFPDSJgwLxgeOwz/QhJBohbdZ0rK2GOZmfbBtgLFM3OweVo7Kk2dbu/EP2SHmFO4USPeYl1RtKY6CZWxm+4L5kBpTYcTjf9sY3NnKXizJEc7I1RQEa5cBbqVQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(396003)(376002)(346002)(230922051799003)(451199024)(64100799003)(82310400011)(186009)(1800799012)(40470700004)(46966006)(36840700001)(36860700001)(6666004)(5660300002)(478600001)(70206006)(2616005)(86362001)(41300700001)(8676002)(8936002)(54906003)(426003)(70586007)(316002)(6916009)(47076005)(82740400003)(83380400001)(1076003)(26005)(336012)(81166007)(356005)(4326008)(36756003)(44832011)(40480700001)(2906002)(40460700003)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jan 2024 21:55:20.4674 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c3589657-cb2f-479a-79fd-08dc115daca5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE6.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4326 From: Volodymyr Babchuk Guest can try to read config space using different access sizes: 8, 16, 32, 64 bits. We need to take this into account when we are returning an error back to MMIO handler, otherwise it is possible to provide more data than requested: i.e. guest issues LDRB instruction to read one byte, but we are writing 0xFFFFFFFFFFFFFFFF in the target register. Signed-off-by: Volodymyr Babchuk Signed-off-by: Stewart Hildebrand --- xen/arch/arm/vpci.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/vpci.c b/xen/arch/arm/vpci.c index b6ef440f17b0..05a479096ef7 100644 --- a/xen/arch/arm/vpci.c +++ b/xen/arch/arm/vpci.c @@ -42,6 +42,8 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, { struct pci_host_bridge *bridge = p; pci_sbdf_t sbdf; + const uint8_t access_size = (1 << info->dabt.size) * 8; + const uint64_t access_mask = GENMASK_ULL(access_size - 1, 0); /* data is needed to prevent a pointer cast on 32bit */ unsigned long data; @@ -49,7 +51,7 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, if ( !vpci_sbdf_from_gpa(v->domain, bridge, info->gpa, &sbdf) ) { - *r = ~0UL; + *r = access_mask; return 1; } @@ -60,7 +62,7 @@ static int vpci_mmio_read(struct vcpu *v, mmio_info_t *info, return 1; } - *r = ~0UL; + *r = access_mask; return 0; }