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[217.31.164.171]) by smtp.gmail.com with ESMTPSA id x37-20020a056a000be500b006edcceffcb0sm7221726pfu.161.2024.04.22.00.37.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Apr 2024 00:37:39 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 33228ea9-007b-11ef-9e3a-7da7ca7a9ce9 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1713771460; x=1714376260; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fqIqZwJgUcekPQuPI1VH6Nw18oRab5zr4LvkDvC5BW8=; b=hgMAzr9/v3VV2ZdPFngyZFvDjtm0yzZ+ChNw/gDYVOnM7giroacv2sqWyMfBdDQl0F UkFF9LnaYkk8M7zyeJYUf+q26CrWhV0Bt3lO57ev03q8ROP1m4vdGQuw2bYPxAxxipos 8pJHZMpv3dtX0OV8+tE8/RZoFFOMUL9Q9O+q8gPmsDcc+UVDznuvXaQKSfSeDbmGO12L oxGuG8OGxAnyYqclPyJBQzbqcF8f4VJDXELoGaMR1HkT8zYa9VH5TB489fHpSqV8NJws Mc+Fi4MxmQju2nqN/2xuJLhkDtQCFAlFRrxoQgl+GNYSHRE+rSVQIuptDKc1Fnk5DoeH 7P3Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1713771460; x=1714376260; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fqIqZwJgUcekPQuPI1VH6Nw18oRab5zr4LvkDvC5BW8=; b=PMGk6NFczZS2xo7RDwgpNHatz3ngnmg4H8A8kWupmpf/ZmHzyPTLhP5yC6N2UVZukT 24UDHYmtbWFTzxwEaAmcA70Qy07pcXx8pq7TWcIs0l6AnZyI1IcnLoBEN+gbfJC8Usfo YQZQd+HkhK/V7cZlRwNvN2X6lowNuI2L2WAvLE2eECC+p1Va6SkBr4WDQWTtisMLldcw 08lhpRAx7BOomnvJ9oc7jyRb9JlAT+rZsrERKzce/UNUNLv6EEB3i6jpbyImo+Tv0AyH 2fNr8NnTsgmiVY+vSk5d+a9JeCkBbGDsGZFEAxkVPZxOcjoE3aDNmNFzUCKnionF/m1T 5yHQ== X-Gm-Message-State: AOJu0YysgCJ5mFXm0+lmYd6oTg6yLxPtXecOFTCnrG568pdLEIi+iT+T vATIEzh88c8APosRsaYnhpjMPD45+NU/zGQOnD42QvU+wUyWFq1L8t+ftlIquncOFyMviwnxD0Q v X-Google-Smtp-Source: AGHT+IFomXvyJRBoJZ6esF5z/ya0gd+1lmpeMxibc4K5rG4EGXwP1H+lFCeoqG4tVAoaic3N+WUdGg== X-Received: by 2002:a05:6a20:8417:b0:1aa:41e4:f1b4 with SMTP id c23-20020a056a20841700b001aa41e4f1b4mr9140138pzd.44.1713771460059; Mon, 22 Apr 2024 00:37:40 -0700 (PDT) From: Jens Wiklander To: xen-devel@lists.xenproject.org Cc: patches@linaro.org, Jens Wiklander , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [XEN PATCH v2 4/5] xen/arm: allow dynamically assigned SGI handlers Date: Mon, 22 Apr 2024 09:37:07 +0200 Message-Id: <20240422073708.3663529-5-jens.wiklander@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240422073708.3663529-1-jens.wiklander@linaro.org> References: <20240422073708.3663529-1-jens.wiklander@linaro.org> MIME-Version: 1.0 Updates so request_irq() can be used with a dynamically assigned SGI irq as input. This prepares for a later patch where an FF-A schedule receiver interrupt handler is installed for an SGI generated by the secure world. gic_route_irq_to_xen() don't gic_set_irq_type() for SGIs since they are always edge triggered. gic_interrupt() is updated to route the dynamically assigned SGIs to do_IRQ() instead of do_sgi(). The latter still handles the statically assigned SGI handlers like for instance GIC_SGI_CALL_FUNCTION. Signed-off-by: Jens Wiklander --- v1->v2 - Update patch description as requested --- xen/arch/arm/gic.c | 5 +++-- xen/arch/arm/irq.c | 7 +++++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 44c40e86defe..e9aeb7138455 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -117,7 +117,8 @@ void gic_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) desc->handler = gic_hw_ops->gic_host_irq_type; - gic_set_irq_type(desc, desc->arch.type); + if ( desc->irq >= NR_GIC_SGI) + gic_set_irq_type(desc, desc->arch.type); gic_set_irq_priority(desc, priority); } @@ -375,7 +376,7 @@ void gic_interrupt(struct cpu_user_regs *regs, int is_fiq) /* Reading IRQ will ACK it */ irq = gic_hw_ops->read_irq(); - if ( likely(irq >= 16 && irq < 1020) ) + if ( likely(irq >= GIC_SGI_MAX && irq < 1020) ) { isb(); do_IRQ(regs, irq, is_fiq); diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index bcce80a4d624..fdb214560978 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -224,9 +224,12 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq, int is_fiq) perfc_incr(irqs); - ASSERT(irq >= 16); /* SGIs do not come down this path */ + /* Statically assigned SGIs do not come down this path */ + ASSERT(irq >= GIC_SGI_MAX); - if ( irq < 32 ) + if ( irq < NR_GIC_SGI ) + perfc_incr(ipis); + else if ( irq < NR_GIC_LOCAL_IRQS ) perfc_incr(ppis); else perfc_incr(spis);