@@ -283,6 +283,8 @@ struct pv_domain
bool pcid;
/* Mitigate L1TF with shadow/crashing? */
bool check_l1tf;
+ /* Issue FLUSH_ROOT_PGTBL for root page-table changes. */
+ bool flush_root_pt;
/* map_domain_page() mapping cache. */
struct mapcache_domain mapcache;
@@ -177,7 +177,7 @@ void flush_area_mask(const cpumask_t *mask, const void *va,
#define flush_root_pgtbl_domain(d) \
{ \
- if ( is_pv_domain(d) && (d)->arch.pv.xpti ) \
+ if ( is_pv_domain(d) && (d)->arch.pv.flush_root_pt ) \
flush_mask((d)->dirty_cpumask, FLUSH_ROOT_PGTBL); \
}
@@ -4167,7 +4167,7 @@ long do_mmu_update(
cmd == MMU_PT_UPDATE_PRESERVE_AD, v);
if ( !rc )
flush_linear_pt = true;
- if ( !rc && pt_owner->arch.pv.xpti )
+ if ( !rc && pt_owner->arch.pv.flush_root_pt )
{
bool local_in_use = false;
@@ -384,6 +384,8 @@ int pv_domain_initialise(struct domain *d)
d->arch.ctxt_switch = &pv_csw;
+ d->arch.pv.flush_root_pt = d->arch.pv.xpti;
+
if ( !is_pv_32bit_domain(d) && use_invpcid && cpu_has_pcid )
switch ( ACCESS_ONCE(opt_pcid) )
{
The current logic gates issuing flush TLB requests with the FLUSH_ROOT_PGTBL flag to XPTI being enabled. In preparation for FLUSH_ROOT_PGTBL also being needed when not using XPTI, untie it from the xpti domain boolean and instead introduce a new flush_root_pt field. No functional change intended, as flush_root_pt == xpti. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> --- xen/arch/x86/include/asm/domain.h | 2 ++ xen/arch/x86/include/asm/flushtlb.h | 2 +- xen/arch/x86/mm.c | 2 +- xen/arch/x86/pv/domain.c | 2 ++ 4 files changed, 6 insertions(+), 2 deletions(-)