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pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Andrew Cooper , Jan Beulich , Julien Grall , Stefano Stabellini , "Bertrand Marquis" , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v3 6/6] xen/arm: mpu: Implement a dummy enable_secondary_cpu_mm Date: Thu, 10 Oct 2024 15:03:51 +0100 Message-ID: <20241010140351.309922-7-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241010140351.309922-1-ayan.kumar.halder@amd.com> References: <20241010140351.309922-1-ayan.kumar.halder@amd.com> MIME-Version: 1.0 Received-SPF: None (SATLEXMB04.amd.com: ayan.kumar.halder@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF0000231B:EE_|SN7PR12MB8604:EE_ X-MS-Office365-Filtering-Correlation-Id: 1de2197c-76f0-45c4-af62-08dce934922c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: zKmaI+0PbdyecuZ5f3AIC0+rnU0Y/yVPFmN7KjOaEdJ5wX/qRhCPPHauVhCtoUe4T6goc+9nnqxmRbT8lcx8k9NztJ2gnofaima+oOj8y9YKVOdnNtRMKTFgjZcjE7usBGqqz9WS+8NbuKa1A6/9is1ZDTqUcyAQ6UjLZuF8k7v+IuwHssDA7AlfsH+fbRXqbaE6kmy0htVzMtnn/FM9QnZjGhNstZVKJqDzfDBFkducvN9pYxmQ2wjkJfoBmO73O8FRPLJs3/7pdhWHl+DdSOpPpvAsphZAt1qY+pCQUD48JO4EmjVBQXJ3cB87snROkKN6MSAQJasB5NNtEIvMU50sZw+d/XgsK0FIy81xHzlhWqOZVluXZw+FcoWQqWOC9AaEP9omR56E/0/M0Z6wq1+jdL5uJMteVy48GyguEFHCOGFTq8VIpxhIAD8KUBmxgUCq0HHRpPSkPn+mcNrEFYMhsVFvMJ6u8c3ovakqHL04zfEQMeoAEczpX8dU33DA8KOI/DTBuOeFlFV08M5kEt4ln5cXkwPAankJOcF2kCGVc44RPg/FQLkS0KfnZJdlzNFULal44y7KswgH0mq1rUTpd5abGmU0btcHDBIkL9nj7ClTMb7elG5dEIVKRTgq/gT/EP5Z9d6dQt/akztCMFTEVLsyz4DakjHgY85eg7/w3Yqh907r9MX+kmMoSi5us38JwRz54N72/9/u+nAu9g9qa2ptIFgjZsc/yth2nUkDW9ns5po8BN94kybZiTcAhNQNGtWgI+snCJA0LjxhLJ9fabfwuRdicpyuZVOa0cY+d8VtAgpShmPSCvi99dpYSwANu/x1Q1HBEvZyeYgzRC0SoCmB0SsH15SAPiVQ+p1vCasGtmqBhRPN8tqG2HqNtgmhG/h7rZ1EGnEWYlyeW/+RDsTZevvIzwZ/pq8Sgr2iuTkuHwUoInviWxOwQJccEkqRVTEpI+w2K1BVMnogw2eBtIhTGAyQ4a5gGCsQM7bI5z4L/h8MJfYVv45athMoYkgKZ8X5p3i65VlZSxppglUo8k8mDXW9YWfqiQlVqUMn+t4eZ7JM7Bwr+UTRXRFlOSFo/LDTnch+tBqoRMujCqsoFSeBeq5vW9uXvrPvAyj3WhgaWsSW+EHJnY1llOcCoVZsmV3GyzvhmRLL2O1jSLfMnuiCcwX7dDiRsy8Lyf8CQZck9XlOXt9L8cxwQiSRso0uENBpHnhNZFfSh/V6DtmwlGVvejfTmD+IpLKw07cF2/4l03P2phdM2N+k7a//Kcq9J3YexWK/PY+CrQ8nOn6tN9ZzSXq/cdrZaNI92Xj4MMFPgeWuQgauJr5+rW2pvxzfqnTxSNXWBnKvR+wkaOiR5Fl5I2jLZry5QdmlDo0RwYNQ49MbY47h5rmA++ds X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Oct 2024 14:05:17.8334 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1de2197c-76f0-45c4-af62-08dce934922c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF0000231B.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB8604 Secondary cpus initialization is not yet supported. Thus, we print an appropriate message and put the secondary cpus in WFE state. And we introduce to BUILD_BUG_ON to prevent users using from building Xen on multiprocessor based MPU systems. In Arm, there is no clean way to disable SMP. As of now, we wish to support MPU on UNP only. So, we have defined the default range of NR_CPUs to be 1 for MPU. Signed-off-by: Ayan Kumar Halder Reviewed-by: Luca Fancellu --- Changes from :- v1 - 1. NR_CPUS is defined as 1 for MPU 2. Added a message in enable_secondary_cpu_mm() v2 - 1. Added the range 2. Clarified in the commit message why/how we have disabled SMP. xen/arch/Kconfig | 2 ++ xen/arch/arm/arm64/mpu/head.S | 10 ++++++++++ xen/arch/arm/setup.c | 5 +++++ 3 files changed, 17 insertions(+) diff --git a/xen/arch/Kconfig b/xen/arch/Kconfig index 308ce129a8..6053e048fa 100644 --- a/xen/arch/Kconfig +++ b/xen/arch/Kconfig @@ -6,11 +6,13 @@ config PHYS_ADDR_T_32 config NR_CPUS int "Maximum number of CPUs" + range 1 1 if MPU range 1 16383 default "256" if X86 default "8" if ARM && RCAR3 default "4" if ARM && QEMU default "4" if ARM && MPSOC + default "1" if ARM && MPU default "128" if ARM help Controls the build-time size of various arrays and bitmaps diff --git a/xen/arch/arm/arm64/mpu/head.S b/xen/arch/arm/arm64/mpu/head.S index e354f4552b..4d36a8c9bc 100644 --- a/xen/arch/arm/arm64/mpu/head.S +++ b/xen/arch/arm/arm64/mpu/head.S @@ -147,6 +147,16 @@ fail: b 1b END(enable_boot_cpu_mm) +/* + * We don't yet support secondary CPUs bring-up. Implement a dummy helper to + * please the common code. + */ +ENTRY(enable_secondary_cpu_mm) + PRINT("- SMP not enabled yet -\r\n") +1: wfe + b 1b +ENDPROC(enable_secondary_cpu_mm) + /* * Local variables: * mode: ASM diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 0203771164..5a0d343f5b 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -296,6 +296,11 @@ void asmlinkage __init start_xen(unsigned long fdt_paddr) int rc, i; #ifdef CONFIG_MPU + /* + * Currently, SMP is not enabled on MPU based systems. + */ + BUILD_BUG_ON(NR_CPUS > 1); + /* * Unlike MMU, MPU does not use pages for translation. However, we continue * to use PAGE_SIZE to denote 4KB. This is so that the existing memory