From patchwork Fri Oct 25 10:06:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jinjie Ruan X-Patchwork-Id: 13850422 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3A23BD0C5F9 for ; Fri, 25 Oct 2024 10:09:48 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.825846.1240231 (Exim 4.92) (envelope-from ) id 1t4HFX-0002wo-H4; Fri, 25 Oct 2024 10:08:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 825846.1240231; Fri, 25 Oct 2024 10:08:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t4HFX-0002w2-9I; Fri, 25 Oct 2024 10:08:55 +0000 Received: by outflank-mailman (input) for mailman id 825846; Fri, 25 Oct 2024 10:08:54 +0000 Received: from se1-gles-flk1-in.inumbo.com ([94.247.172.50] helo=se1-gles-flk1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1t4HFW-0000tn-Bo for xen-devel@lists.xenproject.org; Fri, 25 Oct 2024 10:08:54 +0000 Received: from szxga04-in.huawei.com (szxga04-in.huawei.com [45.249.212.190]) by se1-gles-flk1.inumbo.com (Halon) with ESMTPS id 1e522168-92b9-11ef-99a3-01e77a169b0f; Fri, 25 Oct 2024 12:08:48 +0200 (CEST) Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4XZdkr6FBHz20qdN; Fri, 25 Oct 2024 18:07:48 +0800 (CST) Received: from kwepemg200008.china.huawei.com (unknown [7.202.181.35]) by mail.maildlp.com (Postfix) with ESMTPS id B7E6D1A0188; Fri, 25 Oct 2024 18:08:42 +0800 (CST) Received: from huawei.com (10.90.53.73) by kwepemg200008.china.huawei.com (7.202.181.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.11; Fri, 25 Oct 2024 18:08:41 +0800 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 1e522168-92b9-11ef-99a3-01e77a169b0f From: Jinjie Ruan To: , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH -next v4 07/19] arm64: entry: Call arm64_preempt_schedule_irq() only if irqs enabled Date: Fri, 25 Oct 2024 18:06:48 +0800 Message-ID: <20241025100700.3714552-8-ruanjinjie@huawei.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025100700.3714552-1-ruanjinjie@huawei.com> References: <20241025100700.3714552-1-ruanjinjie@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.90.53.73] X-ClientProxiedBy: dggems701-chm.china.huawei.com (10.3.19.178) To kwepemg200008.china.huawei.com (7.202.181.35) Only if irqs are enabled when the interrupt trapped, there may be a chance to reschedule after the interrupt has been handled, so move arm64_preempt_schedule_irq() into regs_irqs_disabled() check false if block. As Mark pointed out, this change will have the following key impact: "We will not preempt when taking interrupts from a region of kernel code where IRQs are enabled but RCU is not watching, matching the behaviour of the generic entry code. This has the potential to introduce livelock if we can ever have a screaming interrupt in such a region, so we'll need to go figure out whether that's actually a problem. Having this as a separate patch will make it easier to test/bisect for that specifically." Suggested-by: Mark Rutland Signed-off-by: Jinjie Ruan --- arch/arm64/kernel/entry-common.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c index e0380812d71e..b57f6dc66115 100644 --- a/arch/arm64/kernel/entry-common.c +++ b/arch/arm64/kernel/entry-common.c @@ -114,8 +114,6 @@ static void __sched arm64_preempt_schedule_irq(void) static void noinstr exit_to_kernel_mode(struct pt_regs *regs, irqentry_state_t state) { - arm64_preempt_schedule_irq(); - mte_check_tfsr_exit(); lockdep_assert_irqs_disabled(); @@ -129,6 +127,8 @@ static void noinstr exit_to_kernel_mode(struct pt_regs *regs, return; } + arm64_preempt_schedule_irq(); + trace_hardirqs_on(); } else { if (state.exit_rcu)