@@ -6,8 +6,10 @@ config PHYS_ADDR_T_32
config NR_CPUS
int "Maximum number of CPUs"
+ range 1 1 if ARM && MPU
range 1 16383
default "256" if X86
+ default "1" if ARM && MPU
default "8" if ARM && RCAR3
default "4" if ARM && QEMU
default "4" if ARM && MPSOC
@@ -142,6 +142,16 @@ FUNC(enable_boot_cpu_mm)
ret
END(enable_boot_cpu_mm)
+/*
+ * We don't yet support secondary CPUs bring-up. Implement a dummy helper to
+ * please the common code.
+ */
+ENTRY(enable_secondary_cpu_mm)
+ PRINT("- SMP not enabled yet -\r\n")
+1: wfe
+ b 1b
+ENDPROC(enable_secondary_cpu_mm)
+
/*
* Local variables:
* mode: ASM
@@ -1,4 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
+#include <xen/init.h>
#include <xen/mm.h>
#include <asm/system.h>
#include <asm/smp.h>
@@ -6,6 +7,16 @@
#include <asm/gic.h>
#include <asm/flushtlb.h>
+static void __init __maybe_unused build_assertions(void)
+{
+#ifdef CONFIG_MPU
+ /*
+ * Currently, SMP is not enabled on MPU based systems.
+ */
+ BUILD_BUG_ON(NR_CPUS > 1);
+#endif
+}
+
void arch_flush_tlb_mask(const cpumask_t *mask)
{
/* No need to IPI other processors on ARM, the processor takes care of it. */