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bh=iFOJrAd0KMsoZrN9Shjj1dooQzMESP1akwRRETW6xhI=; b=ens/F7esvTX9U4hlVjvFwAwKPCgacatzecxS8uSDfkrIoDq87HsSVLxonE1jtmji1hcP8EAe87VWJsZd3XTPsy+ph4PrMP5MjdLsM3y2BMf6N1sSKrkyzKwPxlw1ZckjJurNNqk37g+MiJxWDX56mwAJBPct93mJ+QlPBklxBT0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C From: Penny Zheng To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko CC: Ray Huang , Xenia Ragiadakou , Jason Andryuk , "Penny Zheng" , , Subject: [PATCH v2 3/4] xen/cppc: get xen-required cppc perf caps data Date: Thu, 5 Dec 2024 13:42:51 +0800 Message-ID: <20241205054252.471761-4-Penny.Zheng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241205054252.471761-1-Penny.Zheng@amd.com> References: <20241205054252.471761-1-Penny.Zheng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC3:EE_|PH8PR12MB7181:EE_ X-MS-Office365-Filtering-Correlation-Id: 77293042-9397-4491-4cd8-08dd14efbd82 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|1800799024|376014|82310400026; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Dec 2024 05:43:26.3932 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 77293042-9397-4491-4cd8-08dd14efbd82 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC3.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7181 When running as Xen dom0 PVH guest, processor logical id <-> physical id map could not be properly set up. So the original function cppc_get_perf_caps() fails to get correct cppc data for Xen ACPI processor. A new function xen_processor_get_perf_caps() is introduced to get xen-required cppc perf caps data. Also, as Xen couldn't read and process PCC-type register, this commit includes a new flag pcc_unsupported in struct acpi_processor_flags to tell whether platform supports PCC-type register. Signed-off-by: Penny Zheng Reviewed-by: Jason Andryuk --- drivers/acpi/cppc_acpi.c | 110 +++++++++++++++++++++++++++++++++++---- include/acpi/cppc_acpi.h | 5 ++ include/acpi/processor.h | 1 + 3 files changed, 105 insertions(+), 11 deletions(-) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index 13d6ff84a1e9..3a436591da07 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -772,6 +772,15 @@ static int acpi_cppc_processor_parse(struct acpi_processor *pr, struct cpc_desc * so extract it only once. */ if (gas_t->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) { + /* + * When ACPI processor represents Xen processor, PCC register type + * could not be properly read and processed right now, as logical + * processor doesn't always have 1:1 map relation to physical processor. + */ + if (pr->flags.pcc_unsupported) { + pr_debug("Unsupported PCC register type:%d\n", pr->acpi_id); + goto out_free; + } if (pcc_subspace_id < 0) { pcc_subspace_id = gas_t->access_width; if (pcc_data_alloc(pcc_subspace_id)) @@ -837,7 +846,9 @@ static int acpi_cppc_processor_parse(struct acpi_processor *pr, struct cpc_desc goto out_free; } } - per_cpu(cpu_pcc_subspace_idx, pr->id) = pcc_subspace_id; + + if (!pr->flags.pcc_unsupported) + per_cpu(cpu_pcc_subspace_idx, pr->id) = pcc_subspace_id; /* * Initialize the remaining cpc_regs as unsupported. @@ -1018,8 +1029,7 @@ int __weak cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val) static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val) { void __iomem *vaddr = NULL; - int size; - int pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); + int size, pcc_ss_id; struct cpc_reg *reg = ®_res->cpc_entry.reg; if (reg_res->type == ACPI_TYPE_INTEGER) { @@ -1044,14 +1054,17 @@ static int cpc_read(int cpu, struct cpc_register_resource *reg_res, u64 *val) *val = val_u32; return 0; - } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM && pcc_ss_id >= 0) { - /* - * For registers in PCC space, the register size is determined - * by the bit width field; the access size is used to indicate - * the PCC subspace id. - */ - size = reg->bit_width; - vaddr = GET_PCC_VADDR(reg->address, pcc_ss_id); + } else if (reg->space_id == ACPI_ADR_SPACE_PLATFORM_COMM) { + pcc_ss_id = per_cpu(cpu_pcc_subspace_idx, cpu); + if (pcc_ss_id >= 0) { + /* + * For registers in PCC space, the register size is determined + * by the bit width field; the access size is used to indicate + * the PCC subspace id. + */ + size = reg->bit_width; + vaddr = GET_PCC_VADDR(reg->address, pcc_ss_id); + } } else if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) vaddr = reg_res->sys_mem_vaddr; @@ -1282,6 +1295,81 @@ int cppc_get_epp_perf(int cpunum, u64 *epp_perf) } EXPORT_SYMBOL_GPL(cppc_get_epp_perf); + +int xen_processor_get_perf_caps(struct acpi_processor *pr, struct cppc_perf_caps *perf_caps) +{ + struct cpc_desc *cpc_ptr; + struct cpc_register_resource *highest_reg, *lowest_reg, + *lowest_non_linear_reg, *nominal_reg, + *low_freq_reg = NULL, *nom_freq_reg = NULL; + u64 high, low, nom, min_nonlinear, low_f = 0, nom_f = 0; + int ret = 0; + + cpc_ptr = kzalloc(sizeof(struct cpc_desc), GFP_KERNEL); + if (!cpc_ptr) + return -ENOMEM; + + ret = acpi_cppc_processor_parse(pr, cpc_ptr); + if (ret) + goto err; + + highest_reg = &cpc_ptr->cpc_regs[HIGHEST_PERF]; + lowest_reg = &cpc_ptr->cpc_regs[LOWEST_PERF]; + lowest_non_linear_reg = &cpc_ptr->cpc_regs[LOW_NON_LINEAR_PERF]; + nominal_reg = &cpc_ptr->cpc_regs[NOMINAL_PERF]; + low_freq_reg = &cpc_ptr->cpc_regs[LOWEST_FREQ]; + nom_freq_reg = &cpc_ptr->cpc_regs[NOMINAL_FREQ]; + + /* Are any of the regs PCC ?*/ + if (CPC_IN_PCC(highest_reg) || CPC_IN_PCC(lowest_reg) || + CPC_IN_PCC(lowest_non_linear_reg) || CPC_IN_PCC(nominal_reg) || + CPC_IN_PCC(low_freq_reg) || CPC_IN_PCC(nom_freq_reg)) { + pr_debug("Unsupported register type read for Xen Processor %d," + "highest_reg in PCC: %s, lowest_reg in PCC: %s," + "lowest_non_linear_reg in PCC: %s, nominal_reg in PCC: %s," + "low_freq_reg in PCC: %s, nom_freq_reg in PCC: %s\n", + pr->acpi_id, CPC_IN_PCC(highest_reg) ? "true" : "false", + CPC_IN_PCC(lowest_reg) ? "true" : "false", + CPC_IN_PCC(lowest_non_linear_reg) ? "true" : "false", + CPC_IN_PCC(nominal_reg) ? "true" : "false", + CPC_IN_PCC(low_freq_reg) ? "true" : "false", + CPC_IN_PCC(nom_freq_reg) ? "true" : "false"); + goto err; + } + + cpc_read(pr->acpi_id, highest_reg, &high); + perf_caps->highest_perf = high; + + cpc_read(pr->acpi_id, lowest_reg, &low); + perf_caps->lowest_perf = low; + + cpc_read(pr->acpi_id, nominal_reg, &nom); + perf_caps->nominal_perf = nom; + + cpc_read(pr->id, lowest_non_linear_reg, &min_nonlinear); + perf_caps->lowest_nonlinear_perf = min_nonlinear; + + if (!high || !low || !nom || !min_nonlinear) + pr_warn("CPPC: read zero cpc register value for Xen Processor %d" + "highest_reg: %llu, lowest_reg: %llu" + "nominal_reg: %llu, lowest_non_linear_reg: %llu\n", + pr->acpi_id, high, low, nom, min_nonlinear); + + /* Read optional lowest and nominal frequencies if present */ + if (CPC_SUPPORTED(low_freq_reg)) + cpc_read(pr->acpi_id, low_freq_reg, &low_f); + + if (CPC_SUPPORTED(nom_freq_reg)) + cpc_read(pr->acpi_id, nom_freq_reg, &nom_f); + + perf_caps->lowest_freq = low_f; + perf_caps->nominal_freq = nom_f; + + err: + kfree(cpc_ptr); + return ret; +} +EXPORT_SYMBOL_GPL(xen_processor_get_perf_caps); /** * cppc_get_perf_caps - Get a CPU's performance capabilities. * @cpunum: CPU from which to get capabilities info. diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h index 76e44e102780..2281110c00b7 100644 --- a/include/acpi/cppc_acpi.h +++ b/include/acpi/cppc_acpi.h @@ -164,6 +164,7 @@ extern int cppc_set_auto_sel(int cpu, bool enable); extern int amd_get_highest_perf(unsigned int cpu, u32 *highest_perf); extern int amd_get_boost_ratio_numerator(unsigned int cpu, u64 *numerator); extern int amd_detect_prefcore(bool *detected); +extern int xen_processor_get_perf_caps(struct acpi_processor *pr, struct cppc_perf_caps *perf_caps); #else /* !CONFIG_ACPI_CPPC_LIB */ static inline int cppc_get_desired_perf(int cpunum, u64 *desired_perf) { @@ -249,6 +250,10 @@ static inline int amd_detect_prefcore(bool *detected) { return -ENODEV; } +static inline int xen_processor_get_perf_caps(struct acpi_processor *pr, struct cppc_perf_caps *perf_caps) +{ + return -ENOTSUPP; +} #endif /* !CONFIG_ACPI_CPPC_LIB */ #endif /* _CPPC_ACPI_H*/ diff --git a/include/acpi/processor.h b/include/acpi/processor.h index e6f6074eadbf..18499cc11366 100644 --- a/include/acpi/processor.h +++ b/include/acpi/processor.h @@ -214,6 +214,7 @@ struct acpi_processor_flags { u8 bm_control:1; u8 bm_check:1; u8 has_cst:1; + u8 pcc_unsupported:1; u8 has_lpi:1; u8 power_setup_done:1; u8 bm_rld_set:1;