| Message ID | 20250314011528.2608217-1-dmukhin@ford.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | x86/irq: use NR_ISAIRQS instead of open-coded value | expand |
On 14.03.2025 02:20, dmkhn@proton.me wrote: > Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance > readability. > > No functional changes. > > Signed-off-by: Denis Mukhin <dmukhin@ford.com> > --- > xen/arch/x86/hvm/dm.c | 2 +- > xen/arch/x86/hvm/irq.c | 17 +++++++++-------- > xen/arch/x86/hvm/vlapic.c | 10 +++++----- > xen/arch/x86/hvm/vpic.c | 4 ++-- > xen/arch/x86/include/asm/irq.h | 2 +- > xen/arch/x86/io_apic.c | 12 ++++++------ > xen/arch/x86/irq.c | 6 +++--- > 7 files changed, 27 insertions(+), 26 deletions(-) > > diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c > index a1f7a4d30a..36d47664e9 100644 > --- a/xen/arch/x86/hvm/dm.c > +++ b/xen/arch/x86/hvm/dm.c > @@ -90,7 +90,7 @@ static int set_pci_intx_level(struct domain *d, uint16_t domain, > static int set_isa_irq_level(struct domain *d, uint8_t isa_irq, > uint8_t level) > { > - if ( isa_irq > 15 ) > + if ( isa_irq >= NR_ISAIRQS ) > return -EINVAL; > > switch ( level ) > diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c > index 1eab44defc..1f7d8ca43e 100644 > --- a/xen/arch/x86/hvm/irq.c > +++ b/xen/arch/x86/hvm/irq.c > @@ -209,7 +209,7 @@ int hvm_isa_irq_assert(struct domain *d, unsigned int isa_irq, > unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); > int vector = -1; > > - ASSERT(isa_irq <= 15); > + ASSERT(isa_irq < NR_ISAIRQS); > > spin_lock(&d->arch.hvm.irq_lock); > > @@ -231,7 +231,7 @@ void hvm_isa_irq_deassert( > struct hvm_irq *hvm_irq = hvm_domain_irq(d); > unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); > > - ASSERT(isa_irq <= 15); > + ASSERT(isa_irq < NR_ISAIRQS); > > spin_lock(&d->arch.hvm.irq_lock); > > @@ -266,12 +266,12 @@ static void hvm_set_callback_irq_level(struct vcpu *v) > if ( asserted && (hvm_irq->gsi_assert_count[gsi]++ == 0) ) > { > vioapic_irq_positive_edge(d, gsi); > - if ( gsi <= 15 ) > + if ( gsi < NR_ISAIRQS ) > vpic_irq_positive_edge(d, gsi); > } > else if ( !asserted && (--hvm_irq->gsi_assert_count[gsi] == 0) ) > { > - if ( gsi <= 15 ) > + if ( gsi < NR_ISAIRQS ) > vpic_irq_negative_edge(d, gsi); > } > break; > @@ -328,7 +328,7 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) > u8 old_isa_irq; > int i; > > - if ( (link > 3) || (isa_irq > 15) ) > + if ( (link > 3) || (isa_irq >= NR_ISAIRQS) ) > return -EINVAL; > > spin_lock(&d->arch.hvm.irq_lock); > @@ -440,7 +440,8 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) > { > case HVMIRQ_callback_gsi: > gsi = hvm_irq->callback_via.gsi; > - if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && (gsi <= 15) ) > + if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && > + (gsi < NR_ISAIRQS) ) > vpic_irq_negative_edge(d, gsi); > break; > case HVMIRQ_callback_pci_intx: > @@ -464,7 +465,7 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) > (hvm_irq->gsi_assert_count[gsi]++ == 0) ) > { > vioapic_irq_positive_edge(d, gsi); > - if ( gsi <= 15 ) > + if ( gsi < NR_ISAIRQS ) > vpic_irq_positive_edge(d, gsi); > } > break; > @@ -764,7 +765,7 @@ static int cf_check irq_check_link(const struct domain *d, > return -EINVAL; > > for ( link = 0; link < ARRAY_SIZE(pci_link->route); link++ ) > - if ( pci_link->route[link] > 15 ) > + if ( pci_link->route[link] >= NR_ISAIRQS ) > { > printk(XENLOG_G_ERR > "HVM restore: PCI-ISA link %u out of range (%u)\n", Up to here I agree with the adjustments made, but ... > --- a/xen/arch/x86/hvm/vlapic.c > +++ b/xen/arch/x86/hvm/vlapic.c > @@ -123,7 +123,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) > * will end up back here. Break the cycle by only injecting LVTERR > * if it will succeed, and folding in RECVILL otherwise. > */ > - if ( (lvterr & APIC_VECTOR_MASK) >= 16 ) > + if ( (lvterr & APIC_VECTOR_MASK) >= NR_ISAIRQS ) > inj = true; > else > set_bit(ilog2(APIC_ESR_RECVILL), &vlapic->hw.pending_esr); > @@ -136,7 +136,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) > > bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec) > { > - if ( unlikely(vec < 16) ) > + if ( unlikely(vec < NR_ISAIRQS) ) > return false; > > if ( hvm_funcs.test_pir && > @@ -150,7 +150,7 @@ void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig) > { > struct vcpu *target = vlapic_vcpu(vlapic); > > - if ( unlikely(vec < 16) ) > + if ( unlikely(vec < NR_ISAIRQS) ) > { > vlapic_error(vlapic, ilog2(APIC_ESR_RECVILL)); > return; > @@ -523,7 +523,7 @@ void vlapic_ipi( > struct vlapic *target = vlapic_lowest_prio( > vlapic_domain(vlapic), vlapic, short_hand, dest, dest_mode); > > - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) > + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) > vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); > else if ( target ) > vlapic_accept_irq(vlapic_vcpu(target), icr_low); > @@ -531,7 +531,7 @@ void vlapic_ipi( > } > > case APIC_DM_FIXED: > - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) > + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) > { > vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); > break; ... the 16 here has a different origin (in the local APIC spec). Changes further down look okay again. Jan
On 14/03/2025 1:20 am, dmkhn@proton.me wrote: > Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance > readability. > > No functional changes. > > Signed-off-by: Denis Mukhin <dmukhin@ford.com> There are currently very few uses of NR_ISAIRQS, and you're about tripling that. Please could you do a prep patch renaming to NR_IRS_IRQS first for legibility? ~Andrew
On 14.03.2025 10:14, Andrew Cooper wrote: > On 14/03/2025 1:20 am, dmkhn@proton.me wrote: >> Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance >> readability. >> >> No functional changes. >> >> Signed-off-by: Denis Mukhin <dmukhin@ford.com> > > There are currently very few uses of NR_ISAIRQS, and you're about > tripling that. > > Please could you do a prep patch renaming to NR_IRS_IRQS first for > legibility? Ftaod - did you perhaps mean NR_ISA_IRQS? Jan
On 14/03/2025 8:51 am, Jan Beulich wrote: > On 14.03.2025 02:20, dmkhn@proton.me wrote: >> Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance >> readability. >> >> No functional changes. >> >> Signed-off-by: Denis Mukhin <dmukhin@ford.com> >> --- >> xen/arch/x86/hvm/dm.c | 2 +- >> xen/arch/x86/hvm/irq.c | 17 +++++++++-------- >> xen/arch/x86/hvm/vlapic.c | 10 +++++----- >> xen/arch/x86/hvm/vpic.c | 4 ++-- >> xen/arch/x86/include/asm/irq.h | 2 +- >> xen/arch/x86/io_apic.c | 12 ++++++------ >> xen/arch/x86/irq.c | 6 +++--- >> 7 files changed, 27 insertions(+), 26 deletions(-) >> >> diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c >> index a1f7a4d30a..36d47664e9 100644 >> --- a/xen/arch/x86/hvm/dm.c >> +++ b/xen/arch/x86/hvm/dm.c >> @@ -90,7 +90,7 @@ static int set_pci_intx_level(struct domain *d, uint16_t domain, >> static int set_isa_irq_level(struct domain *d, uint8_t isa_irq, >> uint8_t level) >> { >> - if ( isa_irq > 15 ) >> + if ( isa_irq >= NR_ISAIRQS ) >> return -EINVAL; >> >> switch ( level ) >> diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c >> index 1eab44defc..1f7d8ca43e 100644 >> --- a/xen/arch/x86/hvm/irq.c >> +++ b/xen/arch/x86/hvm/irq.c >> @@ -209,7 +209,7 @@ int hvm_isa_irq_assert(struct domain *d, unsigned int isa_irq, >> unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); >> int vector = -1; >> >> - ASSERT(isa_irq <= 15); >> + ASSERT(isa_irq < NR_ISAIRQS); >> >> spin_lock(&d->arch.hvm.irq_lock); >> >> @@ -231,7 +231,7 @@ void hvm_isa_irq_deassert( >> struct hvm_irq *hvm_irq = hvm_domain_irq(d); >> unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); >> >> - ASSERT(isa_irq <= 15); >> + ASSERT(isa_irq < NR_ISAIRQS); >> >> spin_lock(&d->arch.hvm.irq_lock); >> >> @@ -266,12 +266,12 @@ static void hvm_set_callback_irq_level(struct vcpu *v) >> if ( asserted && (hvm_irq->gsi_assert_count[gsi]++ == 0) ) >> { >> vioapic_irq_positive_edge(d, gsi); >> - if ( gsi <= 15 ) >> + if ( gsi < NR_ISAIRQS ) >> vpic_irq_positive_edge(d, gsi); >> } >> else if ( !asserted && (--hvm_irq->gsi_assert_count[gsi] == 0) ) >> { >> - if ( gsi <= 15 ) >> + if ( gsi < NR_ISAIRQS ) >> vpic_irq_negative_edge(d, gsi); >> } >> break; >> @@ -328,7 +328,7 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) >> u8 old_isa_irq; >> int i; >> >> - if ( (link > 3) || (isa_irq > 15) ) >> + if ( (link > 3) || (isa_irq >= NR_ISAIRQS) ) >> return -EINVAL; >> >> spin_lock(&d->arch.hvm.irq_lock); >> @@ -440,7 +440,8 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) >> { >> case HVMIRQ_callback_gsi: >> gsi = hvm_irq->callback_via.gsi; >> - if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && (gsi <= 15) ) >> + if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && >> + (gsi < NR_ISAIRQS) ) >> vpic_irq_negative_edge(d, gsi); >> break; >> case HVMIRQ_callback_pci_intx: >> @@ -464,7 +465,7 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) >> (hvm_irq->gsi_assert_count[gsi]++ == 0) ) >> { >> vioapic_irq_positive_edge(d, gsi); >> - if ( gsi <= 15 ) >> + if ( gsi < NR_ISAIRQS ) >> vpic_irq_positive_edge(d, gsi); >> } >> break; >> @@ -764,7 +765,7 @@ static int cf_check irq_check_link(const struct domain *d, >> return -EINVAL; >> >> for ( link = 0; link < ARRAY_SIZE(pci_link->route); link++ ) >> - if ( pci_link->route[link] > 15 ) >> + if ( pci_link->route[link] >= NR_ISAIRQS ) >> { >> printk(XENLOG_G_ERR >> "HVM restore: PCI-ISA link %u out of range (%u)\n", > Up to here I agree with the adjustments made, but ... > >> --- a/xen/arch/x86/hvm/vlapic.c >> +++ b/xen/arch/x86/hvm/vlapic.c >> @@ -123,7 +123,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) >> * will end up back here. Break the cycle by only injecting LVTERR >> * if it will succeed, and folding in RECVILL otherwise. >> */ >> - if ( (lvterr & APIC_VECTOR_MASK) >= 16 ) >> + if ( (lvterr & APIC_VECTOR_MASK) >= NR_ISAIRQS ) >> inj = true; >> else >> set_bit(ilog2(APIC_ESR_RECVILL), &vlapic->hw.pending_esr); >> @@ -136,7 +136,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) >> >> bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec) >> { >> - if ( unlikely(vec < 16) ) >> + if ( unlikely(vec < NR_ISAIRQS) ) >> return false; >> >> if ( hvm_funcs.test_pir && >> @@ -150,7 +150,7 @@ void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig) >> { >> struct vcpu *target = vlapic_vcpu(vlapic); >> >> - if ( unlikely(vec < 16) ) >> + if ( unlikely(vec < NR_ISAIRQS) ) >> { >> vlapic_error(vlapic, ilog2(APIC_ESR_RECVILL)); >> return; >> @@ -523,7 +523,7 @@ void vlapic_ipi( >> struct vlapic *target = vlapic_lowest_prio( >> vlapic_domain(vlapic), vlapic, short_hand, dest, dest_mode); >> >> - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) >> + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) >> vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); >> else if ( target ) >> vlapic_accept_irq(vlapic_vcpu(target), icr_low); >> @@ -531,7 +531,7 @@ void vlapic_ipi( >> } >> >> case APIC_DM_FIXED: >> - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) >> + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) >> { >> vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); >> break; > ... the 16 here has a different origin (in the local APIC spec). Indeed. These are about the first 16 vectors in the IDT, and and aren't related to ISA (or any other type) of IRQ. ~Andrew
On 14/03/2025 9:16 am, Jan Beulich wrote: > On 14.03.2025 10:14, Andrew Cooper wrote: >> On 14/03/2025 1:20 am, dmkhn@proton.me wrote: >>> Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance >>> readability. >>> >>> No functional changes. >>> >>> Signed-off-by: Denis Mukhin <dmukhin@ford.com> >> There are currently very few uses of NR_ISAIRQS, and you're about >> tripling that. >> >> Please could you do a prep patch renaming to NR_IRS_IRQS first for >> legibility? > Ftaod - did you perhaps mean NR_ISA_IRQS? Oh, yes, sorry. That was a typo. ~Andrew
On Friday, March 14th, 2025 at 1:51 AM, Jan Beulich <jbeulich@suse.com> wrote: > > > On 14.03.2025 02:20, dmkhn@proton.me wrote: > > > Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance > > readability. > > > > No functional changes. > > > > Signed-off-by: Denis Mukhin dmukhin@ford.com > > --- > > xen/arch/x86/hvm/dm.c | 2 +- > > xen/arch/x86/hvm/irq.c | 17 +++++++++-------- > > xen/arch/x86/hvm/vlapic.c | 10 +++++----- > > xen/arch/x86/hvm/vpic.c | 4 ++-- > > xen/arch/x86/include/asm/irq.h | 2 +- > > xen/arch/x86/io_apic.c | 12 ++++++------ > > xen/arch/x86/irq.c | 6 +++--- > > 7 files changed, 27 insertions(+), 26 deletions(-) > > > > diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c > > index a1f7a4d30a..36d47664e9 100644 > > --- a/xen/arch/x86/hvm/dm.c > > +++ b/xen/arch/x86/hvm/dm.c > > @@ -90,7 +90,7 @@ static int set_pci_intx_level(struct domain *d, uint16_t domain, > > static int set_isa_irq_level(struct domain *d, uint8_t isa_irq, > > uint8_t level) > > { > > - if ( isa_irq > 15 ) > > + if ( isa_irq >= NR_ISAIRQS ) > > return -EINVAL; > > > > switch ( level ) > > diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c > > index 1eab44defc..1f7d8ca43e 100644 > > --- a/xen/arch/x86/hvm/irq.c > > +++ b/xen/arch/x86/hvm/irq.c > > @@ -209,7 +209,7 @@ int hvm_isa_irq_assert(struct domain *d, unsigned int isa_irq, > > unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); > > int vector = -1; > > > > - ASSERT(isa_irq <= 15); > > + ASSERT(isa_irq < NR_ISAIRQS); > > > > spin_lock(&d->arch.hvm.irq_lock); > > > > @@ -231,7 +231,7 @@ void hvm_isa_irq_deassert( > > struct hvm_irq *hvm_irq = hvm_domain_irq(d); > > unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); > > > > - ASSERT(isa_irq <= 15); > > + ASSERT(isa_irq < NR_ISAIRQS); > > > > spin_lock(&d->arch.hvm.irq_lock); > > > > @@ -266,12 +266,12 @@ static void hvm_set_callback_irq_level(struct vcpu *v) > > if ( asserted && (hvm_irq->gsi_assert_count[gsi]++ == 0) ) > > { > > vioapic_irq_positive_edge(d, gsi); > > - if ( gsi <= 15 ) > > + if ( gsi < NR_ISAIRQS ) > > vpic_irq_positive_edge(d, gsi); > > } > > else if ( !asserted && (--hvm_irq->gsi_assert_count[gsi] == 0) ) > > { > > - if ( gsi <= 15 ) > > + if ( gsi < NR_ISAIRQS ) > > vpic_irq_negative_edge(d, gsi); > > } > > break; > > @@ -328,7 +328,7 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) > > u8 old_isa_irq; > > int i; > > > > - if ( (link > 3) || (isa_irq > 15) ) > > + if ( (link > 3) || (isa_irq >= NR_ISAIRQS) ) > > return -EINVAL; > > > > spin_lock(&d->arch.hvm.irq_lock); > > @@ -440,7 +440,8 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) > > { > > case HVMIRQ_callback_gsi: > > gsi = hvm_irq->callback_via.gsi; > > - if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && (gsi <= 15) ) > > + if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && > > + (gsi < NR_ISAIRQS) ) > > vpic_irq_negative_edge(d, gsi); > > break; > > case HVMIRQ_callback_pci_intx: > > @@ -464,7 +465,7 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) > > (hvm_irq->gsi_assert_count[gsi]++ == 0) ) > > { > > vioapic_irq_positive_edge(d, gsi); > > - if ( gsi <= 15 ) > > + if ( gsi < NR_ISAIRQS ) > > vpic_irq_positive_edge(d, gsi); > > } > > break; > > @@ -764,7 +765,7 @@ static int cf_check irq_check_link(const struct domain *d, > > return -EINVAL; > > > > for ( link = 0; link < ARRAY_SIZE(pci_link->route); link++ ) > > - if ( pci_link->route[link] > 15 ) > > + if ( pci_link->route[link] >= NR_ISAIRQS ) > > { > > printk(XENLOG_G_ERR > > "HVM restore: PCI-ISA link %u out of range (%u)\n", > > > Up to here I agree with the adjustments made, but ... > > > --- a/xen/arch/x86/hvm/vlapic.c > > +++ b/xen/arch/x86/hvm/vlapic.c > > @@ -123,7 +123,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) > > * will end up back here. Break the cycle by only injecting LVTERR > > * if it will succeed, and folding in RECVILL otherwise. > > */ > > - if ( (lvterr & APIC_VECTOR_MASK) >= 16 ) > > + if ( (lvterr & APIC_VECTOR_MASK) >= NR_ISAIRQS ) > > inj = true; > > else > > set_bit(ilog2(APIC_ESR_RECVILL), &vlapic->hw.pending_esr); > > @@ -136,7 +136,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) > > > > bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec) > > { > > - if ( unlikely(vec < 16) ) > > + if ( unlikely(vec < NR_ISAIRQS) ) > > return false; > > > > if ( hvm_funcs.test_pir && > > @@ -150,7 +150,7 @@ void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig) > > { > > struct vcpu *target = vlapic_vcpu(vlapic); > > > > - if ( unlikely(vec < 16) ) > > + if ( unlikely(vec < NR_ISAIRQS) ) > > { > > vlapic_error(vlapic, ilog2(APIC_ESR_RECVILL)); > > return; > > @@ -523,7 +523,7 @@ void vlapic_ipi( > > struct vlapic *target = vlapic_lowest_prio( > > vlapic_domain(vlapic), vlapic, short_hand, dest, dest_mode); > > > > - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) > > + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) > > vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); > > else if ( target ) > > vlapic_accept_irq(vlapic_vcpu(target), icr_low); > > @@ -531,7 +531,7 @@ void vlapic_ipi( > > } > > > > case APIC_DM_FIXED: > > - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) > > + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) > > { > > vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); > > break; > > > ... the 16 here has a different origin (in the local APIC spec). Changes > further down look okay again. Sorry for that, I did not verify with the spec. Thanks! > > Jan
On Friday, March 14th, 2025 at 2:14 AM, Andrew Cooper <andrew.cooper3@citrix.com> wrote: > > > On 14/03/2025 1:20 am, dmkhn@proton.me wrote: > > > Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance > > readability. > > > > No functional changes. > > > > Signed-off-by: Denis Mukhin dmukhin@ford.com > > > There are currently very few uses of NR_ISAIRQS, and you're about > tripling that. > > Please could you do a prep patch renaming to NR_IRS_IRQS first for > legibility? Posted here: https://lore.kernel.org/xen-devel/20250315010033.2917197-2-dmukhin@ford.com/ Thanks! > > ~Andrew
diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index a1f7a4d30a..36d47664e9 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -90,7 +90,7 @@ static int set_pci_intx_level(struct domain *d, uint16_t domain, static int set_isa_irq_level(struct domain *d, uint8_t isa_irq, uint8_t level) { - if ( isa_irq > 15 ) + if ( isa_irq >= NR_ISAIRQS ) return -EINVAL; switch ( level ) diff --git a/xen/arch/x86/hvm/irq.c b/xen/arch/x86/hvm/irq.c index 1eab44defc..1f7d8ca43e 100644 --- a/xen/arch/x86/hvm/irq.c +++ b/xen/arch/x86/hvm/irq.c @@ -209,7 +209,7 @@ int hvm_isa_irq_assert(struct domain *d, unsigned int isa_irq, unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); int vector = -1; - ASSERT(isa_irq <= 15); + ASSERT(isa_irq < NR_ISAIRQS); spin_lock(&d->arch.hvm.irq_lock); @@ -231,7 +231,7 @@ void hvm_isa_irq_deassert( struct hvm_irq *hvm_irq = hvm_domain_irq(d); unsigned int gsi = hvm_isa_irq_to_gsi(isa_irq); - ASSERT(isa_irq <= 15); + ASSERT(isa_irq < NR_ISAIRQS); spin_lock(&d->arch.hvm.irq_lock); @@ -266,12 +266,12 @@ static void hvm_set_callback_irq_level(struct vcpu *v) if ( asserted && (hvm_irq->gsi_assert_count[gsi]++ == 0) ) { vioapic_irq_positive_edge(d, gsi); - if ( gsi <= 15 ) + if ( gsi < NR_ISAIRQS ) vpic_irq_positive_edge(d, gsi); } else if ( !asserted && (--hvm_irq->gsi_assert_count[gsi] == 0) ) { - if ( gsi <= 15 ) + if ( gsi < NR_ISAIRQS ) vpic_irq_negative_edge(d, gsi); } break; @@ -328,7 +328,7 @@ int hvm_set_pci_link_route(struct domain *d, u8 link, u8 isa_irq) u8 old_isa_irq; int i; - if ( (link > 3) || (isa_irq > 15) ) + if ( (link > 3) || (isa_irq >= NR_ISAIRQS) ) return -EINVAL; spin_lock(&d->arch.hvm.irq_lock); @@ -440,7 +440,8 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) { case HVMIRQ_callback_gsi: gsi = hvm_irq->callback_via.gsi; - if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && (gsi <= 15) ) + if ( (--hvm_irq->gsi_assert_count[gsi] == 0) && + (gsi < NR_ISAIRQS) ) vpic_irq_negative_edge(d, gsi); break; case HVMIRQ_callback_pci_intx: @@ -464,7 +465,7 @@ void hvm_set_callback_via(struct domain *d, uint64_t via) (hvm_irq->gsi_assert_count[gsi]++ == 0) ) { vioapic_irq_positive_edge(d, gsi); - if ( gsi <= 15 ) + if ( gsi < NR_ISAIRQS ) vpic_irq_positive_edge(d, gsi); } break; @@ -764,7 +765,7 @@ static int cf_check irq_check_link(const struct domain *d, return -EINVAL; for ( link = 0; link < ARRAY_SIZE(pci_link->route); link++ ) - if ( pci_link->route[link] > 15 ) + if ( pci_link->route[link] >= NR_ISAIRQS ) { printk(XENLOG_G_ERR "HVM restore: PCI-ISA link %u out of range (%u)\n", diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index 065b2aab5b..7511d6c434 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -123,7 +123,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) * will end up back here. Break the cycle by only injecting LVTERR * if it will succeed, and folding in RECVILL otherwise. */ - if ( (lvterr & APIC_VECTOR_MASK) >= 16 ) + if ( (lvterr & APIC_VECTOR_MASK) >= NR_ISAIRQS ) inj = true; else set_bit(ilog2(APIC_ESR_RECVILL), &vlapic->hw.pending_esr); @@ -136,7 +136,7 @@ static void vlapic_error(struct vlapic *vlapic, unsigned int err_bit) bool vlapic_test_irq(const struct vlapic *vlapic, uint8_t vec) { - if ( unlikely(vec < 16) ) + if ( unlikely(vec < NR_ISAIRQS) ) return false; if ( hvm_funcs.test_pir && @@ -150,7 +150,7 @@ void vlapic_set_irq(struct vlapic *vlapic, uint8_t vec, uint8_t trig) { struct vcpu *target = vlapic_vcpu(vlapic); - if ( unlikely(vec < 16) ) + if ( unlikely(vec < NR_ISAIRQS) ) { vlapic_error(vlapic, ilog2(APIC_ESR_RECVILL)); return; @@ -523,7 +523,7 @@ void vlapic_ipi( struct vlapic *target = vlapic_lowest_prio( vlapic_domain(vlapic), vlapic, short_hand, dest, dest_mode); - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); else if ( target ) vlapic_accept_irq(vlapic_vcpu(target), icr_low); @@ -531,7 +531,7 @@ void vlapic_ipi( } case APIC_DM_FIXED: - if ( unlikely((icr_low & APIC_VECTOR_MASK) < 16) ) + if ( unlikely((icr_low & APIC_VECTOR_MASK) < NR_ISAIRQS) ) { vlapic_error(vlapic, ilog2(APIC_ESR_SENDILL)); break; diff --git a/xen/arch/x86/hvm/vpic.c b/xen/arch/x86/hvm/vpic.c index 6427b08086..c4ff96a2ad 100644 --- a/xen/arch/x86/hvm/vpic.c +++ b/xen/arch/x86/hvm/vpic.c @@ -523,7 +523,7 @@ void vpic_irq_positive_edge(struct domain *d, int irq) uint8_t mask = 1 << (irq & 7); ASSERT(has_vpic(d)); - ASSERT(irq <= 15); + ASSERT(irq < NR_ISAIRQS); ASSERT(vpic_is_locked(vpic)); TRACE_TIME(TRC_HVM_EMUL_PIC_POSEDGE, irq); @@ -541,7 +541,7 @@ void vpic_irq_negative_edge(struct domain *d, int irq) uint8_t mask = 1 << (irq & 7); ASSERT(has_vpic(d)); - ASSERT(irq <= 15); + ASSERT(irq < NR_ISAIRQS); ASSERT(vpic_is_locked(vpic)); TRACE_TIME(TRC_HVM_EMUL_PIC_NEGEDGE, irq); diff --git a/xen/arch/x86/include/asm/irq.h b/xen/arch/x86/include/asm/irq.h index f9ed5dc86c..c7a557133b 100644 --- a/xen/arch/x86/include/asm/irq.h +++ b/xen/arch/x86/include/asm/irq.h @@ -108,7 +108,7 @@ extern bool opt_noirqbalance; extern int opt_irq_vector_map; -#define platform_legacy_irq(irq) ((irq) < 16) +#define platform_legacy_irq(irq) ((irq) < NR_ISAIRQS) void cf_check event_check_interrupt(void); void cf_check invalidate_interrupt(void); diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index c6cf944811..e224fae80f 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2715,15 +2715,15 @@ void __init ioapic_init(void) " than \"nr_irqs=\"\n"); max_gsi_irqs = nr_irqs; } - if ( max_gsi_irqs < 16 ) - max_gsi_irqs = 16; + if ( max_gsi_irqs < NR_ISAIRQS ) + max_gsi_irqs = NR_ISAIRQS; /* for PHYSDEVOP_pirq_eoi_gmfn guest assumptions */ if ( max_gsi_irqs > PAGE_SIZE * 8 ) max_gsi_irqs = PAGE_SIZE * 8; - if ( !smp_found_config || skip_ioapic_setup || nr_irqs_gsi < 16 ) - nr_irqs_gsi = 16; + if ( !smp_found_config || skip_ioapic_setup || nr_irqs_gsi < NR_ISAIRQS ) + nr_irqs_gsi = NR_ISAIRQS; else if ( nr_irqs_gsi > max_gsi_irqs ) { printk(XENLOG_WARNING "Limiting to %u GSI IRQs (found %u)\n", @@ -2736,8 +2736,8 @@ void __init ioapic_init(void) max(0U + num_present_cpus() * NR_DYNAMIC_VECTORS, 8 * nr_irqs_gsi) : nr_irqs_gsi; - else if ( nr_irqs < 16 ) - nr_irqs = 16; + else if ( nr_irqs < NR_ISAIRQS ) + nr_irqs = NR_ISAIRQS; printk(XENLOG_INFO "IRQ limits: %u GSI, %u MSI/MSI-X\n", nr_irqs_gsi, nr_irqs - nr_irqs_gsi); } diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index f35894577b..8c64cf1605 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -36,7 +36,7 @@ bool __read_mostly opt_noirqbalance; boolean_param("noirqbalance", opt_noirqbalance); -unsigned int __read_mostly nr_irqs_gsi = 16; +unsigned int __read_mostly nr_irqs_gsi = NR_ISAIRQS; unsigned int __read_mostly nr_irqs; integer_param("nr_irqs", nr_irqs); @@ -1525,7 +1525,7 @@ void desc_guest_eoi(struct irq_desc *desc, struct pirq *pirq) int pirq_guest_unmask(struct domain *d) { unsigned int pirq = 0, n, i; - struct pirq *pirqs[16]; + struct pirq *pirqs[NR_ISAIRQS]; do { n = radix_tree_gang_lookup(&d->pirq_tree, (void **)pirqs, pirq, @@ -2113,7 +2113,7 @@ int get_free_pirq(struct domain *d, int type) if ( type == MAP_PIRQ_TYPE_GSI ) { - for ( i = 16; i < nr_irqs_gsi; i++ ) + for ( i = NR_ISAIRQS; i < nr_irqs_gsi; i++ ) if ( is_free_pirq(d, pirq_info(d, i)) ) { pirq_get_info(d, i);
Replace the open-coded value 16 with the NR_ISAIRQS symbol to enhance readability. No functional changes. Signed-off-by: Denis Mukhin <dmukhin@ford.com> --- xen/arch/x86/hvm/dm.c | 2 +- xen/arch/x86/hvm/irq.c | 17 +++++++++-------- xen/arch/x86/hvm/vlapic.c | 10 +++++----- xen/arch/x86/hvm/vpic.c | 4 ++-- xen/arch/x86/include/asm/irq.h | 2 +- xen/arch/x86/io_apic.c | 12 ++++++------ xen/arch/x86/irq.c | 6 +++--- 7 files changed, 27 insertions(+), 26 deletions(-)