diff mbox series

[v2] ARM/vgic: Use for_each_set_bit() in vgic_mmio_write_sgir()

Message ID 20250314212153.136154-1-andrew.cooper3@citrix.com (mailing list archive)
State New
Headers show
Series [v2] ARM/vgic: Use for_each_set_bit() in vgic_mmio_write_sgir() | expand

Commit Message

Andrew Cooper March 14, 2025, 9:21 p.m. UTC 
The bitmap_for_each() expression only inspects the bottom 8 bits of targets.
Change it's type to uint8_t and use for_each_set_bit() which is more efficient
over scalars.

GICD_SGI_TARGET_LIST_MASK is 2 bits wide.  Two cases discard the prior
calculation, and one case exits early.

Therefore, move the GICD_SGI_TARGET_MASK calculation into the only case which
wants it, and use MASK_EXTR() to simplify the expression.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
---
CC: Stefano Stabellini <sstabellini@kernel.org>
CC: Julien Grall <julien@xen.org>
CC: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
CC: Bertrand Marquis <bertrand.marquis@arm.com>
CC: Michal Orzel <michal.orzel@amd.com>

v2:
 * Split out of prior VGIC work as it's somewhat standalone.
 * Leave the case labels as they were.
---
 xen/arch/arm/vgic/vgic-mmio-v2.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)


base-commit: 17e5060023685f3ca4d91b69675c5ba77685845a
prerequisite-patch-id: b61e58b40ec8f03baec78dd76ed47debdc4f6734
prerequisite-patch-id: 8afac5fd1570ffad810f4721007063037910724b
prerequisite-patch-id: 14fc34d8e2613f9c122a7b08b32698d7c55f2760
prerequisite-patch-id: b894b277228a61a2d47b28f2f11951809ce09a55
prerequisite-patch-id: e024feb79e9db58aa401d423bd7a4e08da155387
prerequisite-patch-id: 6971f7be40c4fd296663ffad4f31aac0fa94838e
diff mbox series

Patch

diff --git a/xen/arch/arm/vgic/vgic-mmio-v2.c b/xen/arch/arm/vgic/vgic-mmio-v2.c
index 670b335db2c3..da62a8078b5f 100644
--- a/xen/arch/arm/vgic/vgic-mmio-v2.c
+++ b/xen/arch/arm/vgic/vgic-mmio-v2.c
@@ -88,13 +88,12 @@  static void vgic_mmio_write_sgir(struct vcpu *source_vcpu,
     struct domain *d = source_vcpu->domain;
     unsigned int nr_vcpus = d->max_vcpus;
     unsigned int intid = val & GICD_SGI_INTID_MASK;
-    unsigned long targets = (val & GICD_SGI_TARGET_MASK) >>
-                            GICD_SGI_TARGET_SHIFT;
-    unsigned int vcpu_id;
+    uint8_t targets = 0;
 
     switch ( val & GICD_SGI_TARGET_LIST_MASK )
     {
     case GICD_SGI_TARGET_LIST:                    /* as specified by targets */
+        targets = MASK_EXTR(val, GICD_SGI_TARGET_MASK);
         targets &= GENMASK(nr_vcpus - 1, 0);      /* limit to existing VCPUs */
         break;
     case GICD_SGI_TARGET_OTHERS:
@@ -104,11 +103,12 @@  static void vgic_mmio_write_sgir(struct vcpu *source_vcpu,
     case GICD_SGI_TARGET_SELF:                    /* this very vCPU only */
         targets = (1U << source_vcpu->vcpu_id);
         break;
-    case 0x3:                                     /* reserved */
+
+    default:                                      /* reserved */
         return;
     }
 
-    bitmap_for_each ( vcpu_id, &targets, 8 )
+    for_each_set_bit ( vcpu_id, targets )
     {
         struct vcpu *vcpu = d->vcpu[vcpu_id];
         struct vgic_irq *irq = vgic_get_irq(d, vcpu, intid);