diff mbox series

[v2,4/6] x86/emulate: remove HAVE_AS_SSE4_2

Message ID 20250403182250.3329498-5-dmukhin@ford.com (mailing list archive)
State New
Headers show
Series x86/asm: cleanups after toolchain baseline upgrade | expand

Commit Message

Denis Mukhin April 3, 2025, 6:23 p.m. UTC 
From: Denis Mukhin <dmukhin@ford.com>

The new toolchain baseline knows the crc32 instructions,
no need to carry the workaround in the code.

Resolves: https://gitlab.com/xen-project/xen/-/work_items/206
Signed-off-by: Denis Mukhin <dmukhin@ford.com>
---
 xen/arch/x86/arch.mk                   | 1 -
 xen/arch/x86/x86_emulate/x86_emulate.c | 7 +++----
 2 files changed, 3 insertions(+), 5 deletions(-)

Comments

Andrew Cooper April 3, 2025, 7:18 p.m. UTC | #1 
On 03/04/2025 7:23 pm, dmkhn@proton.me wrote:
> From: Denis Mukhin <dmukhin@ford.com>
>
> The new toolchain baseline knows the crc32 instructions,
> no need to carry the workaround in the code.
>
> Resolves: https://gitlab.com/xen-project/xen/-/work_items/206
> Signed-off-by: Denis Mukhin <dmukhin@ford.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
diff mbox series

Patch

diff --git a/xen/arch/x86/arch.mk b/xen/arch/x86/arch.mk
index dcc8c3c330..3bbaee2a44 100644
--- a/xen/arch/x86/arch.mk
+++ b/xen/arch/x86/arch.mk
@@ -10,7 +10,6 @@  CFLAGS += -msoft-float
 
 $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
 $(call cc-option-add,CFLAGS,CC,-Wnested-externs)
-$(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2)
 $(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND)
 $(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT)
 $(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED)
diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c
index 535d803588..55d36b9a26 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6882,7 +6882,7 @@  x86_emulate(
             goto unhandleable;
         }
         break;
-#ifdef HAVE_AS_SSE4_2
+
     case X86EMUL_OPC_F2(0x0f38, 0xf0): /* crc32 r/m8, r{32,64} */
     case X86EMUL_OPC_F2(0x0f38, 0xf1): /* crc32 r/m{16,32,64}, r{32,64} */
         host_and_vcpu_must_have(sse4_2);
@@ -6901,17 +6901,16 @@  x86_emulate(
             asm ( "crc32l %1,%k0" : "+r" (dst.val)
                                   : "rm" (*(uint32_t *)&src.val) );
             break;
-# ifdef __x86_64__
+#ifdef __x86_64__
         case 8:
             asm ( "crc32q %1,%0" : "+r" (dst.val) : "rm" (src.val) );
             break;
-# endif
+#endif
         default:
             ASSERT_UNREACHABLE();
             goto unhandleable;
         }
         break;
-#endif
 
     case X86EMUL_OPC_VEX(0x0f38, 0xf2):    /* andn r/m,r,r */
     case X86EMUL_OPC_VEX(0x0f38, 0xf5):    /* bzhi r,r/m,r */