@@ -162,7 +162,6 @@ static int cf_check parse_ept_param_runt
/* Dynamic (run-time adjusted) execution control flags. */
struct vmx_caps __ro_after_init vmx_caps;
-u32 vmx_cpu_based_exec_control __read_mostly;
u32 vmx_secondary_exec_control __read_mostly;
uint64_t vmx_tertiary_exec_control __read_mostly;
u32 vmx_vmexit_control __read_mostly;
@@ -261,7 +260,6 @@ static int vmx_init_vmcs_config(bool bsp
{
u32 vmx_basic_msr_low, vmx_basic_msr_high, min, opt;
struct vmx_caps caps = {};
- u32 _vmx_cpu_based_exec_control;
u32 _vmx_secondary_exec_control = 0;
uint64_t _vmx_tertiary_exec_control = 0;
u64 _vmx_ept_vpid_cap = 0;
@@ -299,12 +297,12 @@ static int vmx_init_vmcs_config(bool bsp
CPU_BASED_MONITOR_TRAP_FLAG |
CPU_BASED_ACTIVATE_SECONDARY_CONTROLS |
CPU_BASED_ACTIVATE_TERTIARY_CONTROLS);
- _vmx_cpu_based_exec_control = adjust_vmx_controls(
+ caps.cpu_based_exec_control = adjust_vmx_controls(
"CPU-Based Exec Control", min, opt,
MSR_IA32_VMX_PROCBASED_CTLS, &mismatch);
- _vmx_cpu_based_exec_control &= ~CPU_BASED_RDTSC_EXITING;
- if ( _vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW )
- _vmx_cpu_based_exec_control &=
+ caps.cpu_based_exec_control &= ~CPU_BASED_RDTSC_EXITING;
+ if ( caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW )
+ caps.cpu_based_exec_control &=
~(CPU_BASED_CR8_LOAD_EXITING | CPU_BASED_CR8_STORE_EXITING);
rdmsrl(MSR_IA32_VMX_MISC, _vmx_misc_cap);
@@ -321,7 +319,7 @@ static int vmx_init_vmcs_config(bool bsp
return -EINVAL;
}
- if ( _vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS )
+ if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS )
{
min = 0;
opt = (SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES |
@@ -351,7 +349,7 @@ static int vmx_init_vmcs_config(bool bsp
* "APIC Register Virtualization" and "Virtual Interrupt Delivery"
* can be set only when "use TPR shadow" is set
*/
- if ( (_vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW) &&
+ if ( (caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW) &&
opt_apicv_enabled )
opt |= SECONDARY_EXEC_APIC_REGISTER_VIRT |
SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY |
@@ -362,7 +360,7 @@ static int vmx_init_vmcs_config(bool bsp
MSR_IA32_VMX_PROCBASED_CTLS2, &mismatch);
}
- if ( _vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS )
+ if ( caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS )
{
uint64_t opt = 0;
@@ -498,7 +496,6 @@ static int vmx_init_vmcs_config(bool bsp
{
/* First time through. */
vmx_caps = caps;
- vmx_cpu_based_exec_control = _vmx_cpu_based_exec_control;
vmx_secondary_exec_control = _vmx_secondary_exec_control;
vmx_tertiary_exec_control = _vmx_tertiary_exec_control;
vmx_ept_vpid_cap = _vmx_ept_vpid_cap;
@@ -531,7 +528,7 @@ static int vmx_init_vmcs_config(bool bsp
vmx_caps.pin_based_exec_control, caps.pin_based_exec_control);
mismatch |= cap_check(
"CPU-Based Exec Control",
- vmx_cpu_based_exec_control, _vmx_cpu_based_exec_control);
+ vmx_caps.cpu_based_exec_control, caps.cpu_based_exec_control);
mismatch |= cap_check(
"Secondary Exec Control",
vmx_secondary_exec_control, _vmx_secondary_exec_control);
@@ -1111,7 +1108,7 @@ static int construct_vmcs(struct vcpu *v
/* VMCS controls. */
__vmwrite(PIN_BASED_VM_EXEC_CONTROL, vmx_caps.pin_based_exec_control);
- v->arch.hvm.vmx.exec_control = vmx_cpu_based_exec_control;
+ v->arch.hvm.vmx.exec_control = vmx_caps.cpu_based_exec_control;
if ( d->arch.vtsc && !cpu_has_vmx_tsc_scaling )
v->arch.hvm.vmx.exec_control |= CPU_BASED_RDTSC_EXITING;
@@ -2214,7 +2211,6 @@ int __init vmx_vmcs_init(void)
* Make sure all dependent features are off as well.
*/
memset(&vmx_caps, 0, sizeof(vmx_caps));
- vmx_cpu_based_exec_control = 0;
vmx_secondary_exec_control = 0;
vmx_tertiary_exec_control = 0;
vmx_vmexit_control = 0;
@@ -210,7 +210,6 @@ void vmx_vmcs_reload(struct vcpu *v);
#define CPU_BASED_MONITOR_EXITING 0x20000000U
#define CPU_BASED_PAUSE_EXITING 0x40000000U
#define CPU_BASED_ACTIVATE_SECONDARY_CONTROLS 0x80000000U
-extern u32 vmx_cpu_based_exec_control;
#define PIN_BASED_EXT_INTR_MASK 0x00000001
#define PIN_BASED_NMI_EXITING 0x00000008
@@ -297,6 +296,7 @@ extern u64 vmx_ept_vpid_cap;
struct vmx_caps {
uint64_t basic_msr;
uint32_t pin_based_exec_control;
+ uint32_t cpu_based_exec_control;
};
extern struct vmx_caps vmx_caps;
@@ -305,15 +305,15 @@ extern struct vmx_caps vmx_caps;
#define cpu_has_vmx_virtualize_apic_accesses \
(vmx_secondary_exec_control & SECONDARY_EXEC_VIRTUALIZE_APIC_ACCESSES)
#define cpu_has_vmx_tpr_shadow \
- (vmx_cpu_based_exec_control & CPU_BASED_TPR_SHADOW)
+ (vmx_caps.cpu_based_exec_control & CPU_BASED_TPR_SHADOW)
#define cpu_has_vmx_vnmi \
(vmx_caps.pin_based_exec_control & PIN_BASED_VIRTUAL_NMIS)
#define cpu_has_vmx_msr_bitmap \
- (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP)
+ (vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_MSR_BITMAP)
#define cpu_has_vmx_secondary_exec_control \
- (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
+ (vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_SECONDARY_CONTROLS)
#define cpu_has_vmx_tertiary_exec_control \
- (vmx_cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS)
+ (vmx_caps.cpu_based_exec_control & CPU_BASED_ACTIVATE_TERTIARY_CONTROLS)
#define cpu_has_vmx_ept \
(vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_EPT)
#define cpu_has_vmx_dt_exiting \
@@ -323,7 +323,7 @@ extern struct vmx_caps vmx_caps;
#define cpu_has_vmx_vpid \
(vmx_secondary_exec_control & SECONDARY_EXEC_ENABLE_VPID)
#define cpu_has_monitor_trap_flag \
- (vmx_cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG)
+ (vmx_caps.cpu_based_exec_control & CPU_BASED_MONITOR_TRAP_FLAG)
#define cpu_has_vmx_pat \
(vmx_vmentry_control & VM_ENTRY_LOAD_GUEST_PAT)
#define cpu_has_vmx_efer \
... to a field in the capability/controls struct. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- v2: New.