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Tue, 18 Aug 2020 13:48:16 +0000 From: Bertrand Marquis To: xen-devel@lists.xenproject.org Cc: nd@arm.com, Stefano Stabellini , Julien Grall , Volodymyr Babchuk , Wei Chen , Andre Przywara Subject: [PATCH 1/2] arm: Add Neoverse N1 processor identifation Date: Tue, 18 Aug 2020 14:47:38 +0100 Message-Id: <46faecc92bee2a02490b926a636c3eafef1d185e.1597740876.git.bertrand.marquis@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: X-ClientProxiedBy: DM5PR07CA0093.namprd07.prod.outlook.com (2603:10b6:4:ae::22) To DB7PR08MB3689.eurprd08.prod.outlook.com (2603:10a6:10:79::16) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from e109506-lin.cambridge.arm.com (217.140.106.49) by DM5PR07CA0093.namprd07.prod.outlook.com (2603:10b6:4:ae::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3305.24 via Frontend Transport; Tue, 18 Aug 2020 13:48:14 +0000 X-Mailer: git-send-email 2.17.1 X-Originating-IP: [217.140.106.49] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: 66bd987e-6a19-43af-ea16-08d8437d61e3 X-MS-TrafficTypeDiagnostic: DB8PR08MB5322:|DBBPR08MB4902: X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: x-checkrecipientrouted: true NoDisclaimer: true X-MS-Oob-TLC-OOBClassifiers: OLM:439;OLM:439; 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CAT:NONE; SFS:(4636009)(376002)(346002)(136003)(39860400002)(396003)(46966005)(36756003)(54906003)(4326008)(5660300002)(36906005)(2906002)(478600001)(7696005)(70206006)(70586007)(316002)(6486002)(44832011)(186003)(81166007)(82740400003)(336012)(8936002)(6666004)(47076004)(16526019)(2616005)(8676002)(82310400002)(6916009)(956004)(356005)(26005)(86362001)(136400200001); DIR:OUT; SFP:1101; X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Aug 2020 13:48:26.4605 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 66bd987e-6a19-43af-ea16-08d8437d61e3 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d; Ip=[63.35.35.123]; Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM5EUR03FT039.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB4902 X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" Add MIDR and CPU part numbers for Neoverse N1 Signed-off-by: Bertrand Marquis Acked-by: Julien Grall --- xen/include/asm-arm/processor.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h index aa642e3ab2..3ca67f8157 100644 --- a/xen/include/asm-arm/processor.h +++ b/xen/include/asm-arm/processor.h @@ -58,6 +58,7 @@ #define ARM_CPU_PART_CORTEX_A73 0xD09 #define ARM_CPU_PART_CORTEX_A75 0xD0A #define ARM_CPU_PART_CORTEX_A76 0xD0B +#define ARM_CPU_PART_NEOVERSE_N1 0xD0C #define MIDR_CORTEX_A12 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A12) #define MIDR_CORTEX_A17 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A17) @@ -68,6 +69,7 @@ #define MIDR_CORTEX_A73 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A73) #define MIDR_CORTEX_A75 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A75) #define MIDR_CORTEX_A76 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A76) +#define MIDR_NEOVERSE_N1 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_NEOVERSE_N1) /* MPIDR Multiprocessor Affinity Register */ #define _MPIDR_UP (30)