From patchwork Tue Mar 9 18:19:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rahul Singh X-Patchwork-Id: 12126355 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6E497C433DB for ; Tue, 9 Mar 2021 18:22:30 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 27D4E650F5 for ; Tue, 9 Mar 2021 18:22:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 27D4E650F5 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=xen-devel-bounces@lists.xenproject.org Received: from list by lists.xenproject.org with outflank-mailman.95671.180641 (Exim 4.92) (envelope-from ) id 1lJgzv-0000bA-GW; Tue, 09 Mar 2021 18:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 95671.180641; Tue, 09 Mar 2021 18:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lJgzv-0000b3-Cj; Tue, 09 Mar 2021 18:22:23 +0000 Received: by outflank-mailman (input) for mailman id 95671; Tue, 09 Mar 2021 18:22:21 +0000 Received: from us1-rack-iad1.inumbo.com ([172.99.69.81]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1lJgzt-0000af-Sv for xen-devel@lists.xenproject.org; Tue, 09 Mar 2021 18:22:21 +0000 Received: from foss.arm.com (unknown [217.140.110.172]) by us1-rack-iad1.inumbo.com (Halon) with ESMTP id 2623d154-ee50-4e79-a823-a4d8eb42ce1c; Tue, 09 Mar 2021 18:22:20 +0000 (UTC) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6030031B; Tue, 9 Mar 2021 10:22:20 -0800 (PST) Received: from e109506.cambridge.arm.com (e109506.cambridge.arm.com [10.1.199.1]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 251ED3F73C; Tue, 9 Mar 2021 10:22:19 -0800 (PST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 2623d154-ee50-4e79-a823-a4d8eb42ce1c From: Rahul Singh To: xen-devel@lists.xenproject.org Cc: bertrand.marquis@arm.com, rahul.singh@arm.com, Stefano Stabellini , Julien Grall , Volodymyr Babchuk Subject: [PATCH 4/5] xen/arm: smmuv1: Add a stream map entry iterator Date: Tue, 9 Mar 2021 18:19:28 +0000 Message-Id: <51cb16f9bc937b647e73189dc16e94a6e71b679c.1615312254.git.rahul.singh@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Backport commit d3097e39302083d58922a3d1032d7d59a63d263d "iommu/arm-smmu: Add a stream map entry iterator" from the Linux kernel. This patch is the preparatory work to fix the stream match conflict when two devices have the same stream-id. Original commit message: We iterate over the SMEs associated with a master config quite a lot in various places, and are about to do so even more. Let's wrap the idiom in a handy iterator macro before the repetition gets out of hand. Signed-off-by: Rahul Singh --- xen/drivers/passthrough/arm/smmu.c | 26 ++++++++++++-------------- 1 file changed, 12 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrough/arm/smmu.c index e1b937bd4b..2c1ea8e6ff 100644 --- a/xen/drivers/passthrough/arm/smmu.c +++ b/xen/drivers/passthrough/arm/smmu.c @@ -618,6 +618,8 @@ struct arm_smmu_master_cfg { s16 smendx[MAX_MASTER_STREAMIDS]; }; #define INVALID_SMENDX -1 +#define for_each_cfg_sme(cfg, i, idx) \ + for (i = 0; idx = cfg->smendx[i], i < cfg->num_streamids; ++i) struct arm_smmu_master { struct device_node *of_node; @@ -1457,8 +1459,8 @@ static int arm_smmu_master_alloc_smes(struct arm_smmu_device *smmu, int i, idx; /* Allocate the SMRs on the SMMU */ - for (i = 0; i < cfg->num_streamids; ++i) { - if (cfg->smendx[i] != INVALID_SMENDX) + for_each_cfg_sme(cfg, i, idx) { + if (idx != INVALID_SMENDX) return -EEXIST; /* ...except on stream indexing hardware, of course */ @@ -1482,8 +1484,8 @@ static int arm_smmu_master_alloc_smes(struct arm_smmu_device *smmu, return 0; /* It worked! Now, poke the actual hardware */ - for (i = 0; i < cfg->num_streamids; ++i) - arm_smmu_write_smr(smmu, cfg->smendx[i]); + for_each_cfg_sme(cfg, i, idx) + arm_smmu_write_smr(smmu, idx); return 0; @@ -1498,15 +1500,13 @@ err_free_smrs: static void arm_smmu_master_free_smes(struct arm_smmu_device *smmu, struct arm_smmu_master_cfg *cfg) { - int i; + int i, idx; /* * We *must* clear the S2CR first, because freeing the SMR means * that it can be re-allocated immediately. */ - for (i = 0; i < cfg->num_streamids; ++i) { - int idx = cfg->smendx[i]; - + for_each_cfg_sme(cfg, i, idx) { /* An IOMMU group is torn down by the first device to be removed */ if (idx == INVALID_SMENDX) return; @@ -1518,9 +1518,9 @@ static void arm_smmu_master_free_smes(struct arm_smmu_device *smmu, __iowmb(); /* Invalidate the SMRs before freeing back to the allocator */ - for (i = 0; i < cfg->num_streamids; ++i) { + for_each_cfg_sme(cfg, i, idx) { if (smmu->smrs) - arm_smmu_free_smr(smmu, cfg->smendx[i]); + arm_smmu_free_smr(smmu, idx); cfg->smendx[i] = INVALID_SMENDX; } @@ -1529,7 +1529,7 @@ static void arm_smmu_master_free_smes(struct arm_smmu_device *smmu, static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain, struct arm_smmu_master_cfg *cfg) { - int i, ret = 0; + int i, idx, ret = 0; struct arm_smmu_device *smmu = smmu_domain->smmu; struct arm_smmu_s2cr *s2cr = smmu->s2crs; enum arm_smmu_s2cr_type type = S2CR_TYPE_TRANS; @@ -1540,9 +1540,7 @@ static int arm_smmu_domain_add_master(struct arm_smmu_domain *smmu_domain, if (ret) return ret; - for (i = 0; i < cfg->num_streamids; ++i) { - int idx = cfg->smendx[i]; - + for_each_cfg_sme(cfg, i, idx) { /* Devices in an IOMMU group may already be configured */ if (type == s2cr[idx].type && cbndx == s2cr[idx].cbndx) break;