From patchwork Wed Aug 2 09:44:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13337935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 884CEC001DF for ; Wed, 2 Aug 2023 09:45:12 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.574819.900411 (Exim 4.92) (envelope-from ) id 1qR8Pd-0000M5-QJ; Wed, 02 Aug 2023 09:45:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 574819.900411; Wed, 02 Aug 2023 09:45:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR8Pd-0000Ly-NE; Wed, 02 Aug 2023 09:45:01 +0000 Received: by outflank-mailman (input) for mailman id 574819; Wed, 02 Aug 2023 09:44:59 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1qR8Pb-0000LL-LD for xen-devel@lists.xenproject.org; Wed, 02 Aug 2023 09:44:59 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id 3e698eaf-3119-11ee-b25f-6b7b168915f2; Wed, 02 Aug 2023 11:44:58 +0200 (CEST) Received: from nico.bugseng.com (unknown [147.123.100.131]) by support.bugseng.com (Postfix) with ESMTPSA id CE9A64EE0740; Wed, 2 Aug 2023 11:44:57 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: 3e698eaf-3119-11ee-b25f-6b7b168915f2 From: Nicola Vetrini To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, Nicola Vetrini , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu Subject: [XEN PATCH 1/4] x86/mce: address MISRA C:2012 Rule 5.3 Date: Wed, 2 Aug 2023 11:44:28 +0200 Message-Id: <52ec7caf08089e3aaaad2bcf709a7d387d55d58f.1690969271.git.nicola.vetrini@bugseng.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 Suitable mechanical renames are made to avoid shadowing, thus addressing violations of MISRA C:2012 Rule 5.3: "An identifier declared in an inner scope shall not hide an identifier declared in an outer scope" Signed-off-by: Nicola Vetrini --- xen/arch/x86/cpu/mcheck/barrier.c | 8 ++++---- xen/arch/x86/cpu/mcheck/barrier.h | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/barrier.c b/xen/arch/x86/cpu/mcheck/barrier.c index a7e5b19a44..51a1d37a76 100644 --- a/xen/arch/x86/cpu/mcheck/barrier.c +++ b/xen/arch/x86/cpu/mcheck/barrier.c @@ -16,11 +16,11 @@ void mce_barrier_dec(struct mce_softirq_barrier *bar) atomic_dec(&bar->val); } -void mce_barrier_enter(struct mce_softirq_barrier *bar, bool wait) +void mce_barrier_enter(struct mce_softirq_barrier *bar, bool do_wait) { int gen; - if ( !wait ) + if ( !do_wait ) return; atomic_inc(&bar->ingen); gen = atomic_read(&bar->outgen); @@ -34,11 +34,11 @@ void mce_barrier_enter(struct mce_softirq_barrier *bar, bool wait) } } -void mce_barrier_exit(struct mce_softirq_barrier *bar, bool wait) +void mce_barrier_exit(struct mce_softirq_barrier *bar, bool do_wait) { int gen; - if ( !wait ) + if ( !do_wait ) return; atomic_inc(&bar->outgen); gen = atomic_read(&bar->ingen); diff --git a/xen/arch/x86/cpu/mcheck/barrier.h b/xen/arch/x86/cpu/mcheck/barrier.h index c4d52b6192..5cd1b4e4bf 100644 --- a/xen/arch/x86/cpu/mcheck/barrier.h +++ b/xen/arch/x86/cpu/mcheck/barrier.h @@ -32,14 +32,14 @@ void mce_barrier_init(struct mce_softirq_barrier *); void mce_barrier_dec(struct mce_softirq_barrier *); /* - * If @wait is false, mce_barrier_enter/exit() will return immediately + * If @do_wait is false, mce_barrier_enter/exit() will return immediately * without touching the barrier. It's used when handling a * non-broadcasting MCE (e.g. MCE on some old Intel CPU, MCE on AMD * CPU and LMCE on Intel Skylake-server CPU) which is received on only * one CPU and thus does not invoke mce_barrier_enter/exit() calls on * all CPUs. * - * If @wait is true, mce_barrier_enter/exit() will handle the given + * If @do_wait is true, mce_barrier_enter/exit() will handle the given * barrier as below. * * Increment the generation number and the value. The generation number @@ -53,8 +53,8 @@ void mce_barrier_dec(struct mce_softirq_barrier *); * These barrier functions should always be paired, so that the * counter value will reach 0 again after all CPUs have exited. */ -void mce_barrier_enter(struct mce_softirq_barrier *, bool wait); -void mce_barrier_exit(struct mce_softirq_barrier *, bool wait); +void mce_barrier_enter(struct mce_softirq_barrier *, bool do_wait); +void mce_barrier_exit(struct mce_softirq_barrier *, bool do_wait); void mce_barrier(struct mce_softirq_barrier *);