From patchwork Fri Jan 29 10:27:38 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 8162121 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B4306BEEE5 for ; Fri, 29 Jan 2016 10:30:46 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id C4ED2201B9 for ; Fri, 29 Jan 2016 10:30:45 +0000 (UTC) Received: from lists.xen.org (lists.xenproject.org [50.57.142.19]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D86BE2017D for ; Fri, 29 Jan 2016 10:30:44 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xen.org) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aP6HG-0000Zq-ST; Fri, 29 Jan 2016 10:27:42 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xen.org with esmtp (Exim 4.72) (envelope-from ) id 1aP6HE-0000Zc-Pj for xen-devel@lists.xenproject.org; Fri, 29 Jan 2016 10:27:41 +0000 Received: from [85.158.137.68] by server-1.bemta-3.messagelabs.com id C2/57-02745-C9E3BA65; Fri, 29 Jan 2016 10:27:40 +0000 X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-4.tower-31.messagelabs.com!1454063257!9370634!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 7.35.1; banners=-,-,- X-VirusChecked: Checked Received: (qmail 32555 invoked from network); 29 Jan 2016 10:27:39 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-4.tower-31.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 29 Jan 2016 10:27:39 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Fri, 29 Jan 2016 03:27:37 -0700 Message-Id: <56AB4CAA02000078000CC53F@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.0 Date: Fri, 29 Jan 2016 03:27:38 -0700 From: "Jan Beulich" To: "xen-devel" References: <56AB4B6102000078000CC51B@prv-mh.provo.novell.com> In-Reply-To: <56AB4B6102000078000CC51B@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper , Keir Fraser , Harmandeep Kaur , Shuai Ruan Subject: [Xen-devel] [PATCH 2/4] x86: adjust xsave structure attributes X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Sender: xen-devel-bounces@lists.xen.org Errors-To: xen-devel-bounces@lists.xen.org X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The packed attribute was pointlessly used here - there are no misaligned fields, and hence even if the attribute took effect, it would at best lead to the compiler generating worse code. At the same time specify the required alignment of the fpu_sse sub- structure, such that the various typeof() uses on that field obtain pointers to properly aligned memory (knowledge which a compiler may want to make use of). Also add suitable build-time checks. Signed-off-by: Jan Beulich x86: adjust xsave structure attributes The packed attribute was pointlessly used here - there are no misaligned fields, and hence even if the attribute took effect, it would at best lead to the compiler generating worse code. At the same time specify the required alignment of the fpu_sse sub- structure, such that the various typeof() uses on that field obtain pointers to properly aligned memory (knowledge which a compiler may want to make use of). Also add suitable build-time checks. Signed-off-by: Jan Beulich --- a/xen/arch/x86/i387.c +++ b/xen/arch/x86/i387.c @@ -277,7 +277,9 @@ int vcpu_init_fpu(struct vcpu *v) } else { - v->arch.fpu_ctxt = _xzalloc(sizeof(v->arch.xsave_area->fpu_sse), 16); + BUILD_BUG_ON(__alignof(v->arch.xsave_area->fpu_sse) < 16); + v->arch.fpu_ctxt = _xzalloc(sizeof(v->arch.xsave_area->fpu_sse), + __alignof(v->arch.xsave_area->fpu_sse)); if ( v->arch.fpu_ctxt ) { typeof(v->arch.xsave_area->fpu_sse) *fpu_sse = v->arch.fpu_ctxt; --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -414,7 +414,8 @@ int xstate_alloc_save_area(struct vcpu * BUG_ON(xsave_cntxt_size < XSTATE_AREA_MIN_SIZE); /* XSAVE/XRSTOR requires the save area be 64-byte-boundary aligned. */ - save_area = _xzalloc(xsave_cntxt_size, 64); + BUILD_BUG_ON(__alignof(*save_area) < 64); + save_area = _xzalloc(xsave_cntxt_size, __alignof(*save_area)); if ( save_area == NULL ) return -ENOMEM; --- a/xen/include/asm-x86/xstate.h +++ b/xen/include/asm-x86/xstate.h @@ -48,9 +48,9 @@ extern u64 xfeature_mask; extern unsigned int *xstate_sizes; /* extended state save area */ -struct __packed __attribute__((aligned (64))) xsave_struct +struct __attribute__((aligned (64))) xsave_struct { - union { /* FPU/MMX, SSE */ + union __attribute__((aligned(16))) { /* FPU/MMX, SSE */ char x[512]; struct { uint16_t fcw; Reviewed-by: Andrew Cooper --- a/xen/arch/x86/i387.c +++ b/xen/arch/x86/i387.c @@ -277,7 +277,9 @@ int vcpu_init_fpu(struct vcpu *v) } else { - v->arch.fpu_ctxt = _xzalloc(sizeof(v->arch.xsave_area->fpu_sse), 16); + BUILD_BUG_ON(__alignof(v->arch.xsave_area->fpu_sse) < 16); + v->arch.fpu_ctxt = _xzalloc(sizeof(v->arch.xsave_area->fpu_sse), + __alignof(v->arch.xsave_area->fpu_sse)); if ( v->arch.fpu_ctxt ) { typeof(v->arch.xsave_area->fpu_sse) *fpu_sse = v->arch.fpu_ctxt; --- a/xen/arch/x86/xstate.c +++ b/xen/arch/x86/xstate.c @@ -414,7 +414,8 @@ int xstate_alloc_save_area(struct vcpu * BUG_ON(xsave_cntxt_size < XSTATE_AREA_MIN_SIZE); /* XSAVE/XRSTOR requires the save area be 64-byte-boundary aligned. */ - save_area = _xzalloc(xsave_cntxt_size, 64); + BUILD_BUG_ON(__alignof(*save_area) < 64); + save_area = _xzalloc(xsave_cntxt_size, __alignof(*save_area)); if ( save_area == NULL ) return -ENOMEM; --- a/xen/include/asm-x86/xstate.h +++ b/xen/include/asm-x86/xstate.h @@ -48,9 +48,9 @@ extern u64 xfeature_mask; extern unsigned int *xstate_sizes; /* extended state save area */ -struct __packed __attribute__((aligned (64))) xsave_struct +struct __attribute__((aligned (64))) xsave_struct { - union { /* FPU/MMX, SSE */ + union __attribute__((aligned(16))) { /* FPU/MMX, SSE */ char x[512]; struct { uint16_t fcw;