From patchwork Thu Mar 17 08:03:50 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 8607741 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id E06D19F3D1 for ; Thu, 17 Mar 2016 08:06:26 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EE05720173 for ; Thu, 17 Mar 2016 08:06:25 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id DD025202EC for ; Thu, 17 Mar 2016 08:06:24 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1agSuS-0004Ov-5c; Thu, 17 Mar 2016 08:03:56 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1agSuR-0004Oj-FI for xen-devel@lists.xenproject.org; Thu, 17 Mar 2016 08:03:55 +0000 Received: from [193.109.254.147] by server-10.bemta-14.messagelabs.com id 02/0C-02986-AE46AE65; Thu, 17 Mar 2016 08:03:54 +0000 X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-15.tower-27.messagelabs.com!1458201832!31853309!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.11; banners=-,-,- X-VirusChecked: Checked Received: (qmail 24067 invoked from network); 17 Mar 2016 08:03:53 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-15.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 17 Mar 2016 08:03:53 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Thu, 17 Mar 2016 02:03:51 -0600 Message-Id: <56EA72F602000078000DD933@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.0 Date: Thu, 17 Mar 2016 02:03:50 -0600 From: "Jan Beulich" To: "xen-devel" References: <56D97AC102000078000D9537@prv-mh.provo.novell.com> <56E14FF502000078000DB232@prv-mh.provo.novell.com> <56E9A0DB02000078000DD54C@prv-mh.provo.novell.com> <56EA6FDF02000078000DD8FB@prv-mh.provo.novell.com> <56EA6FDF02000078000DD8FB@prv-mh.provo.novell.com> In-Reply-To: <56EA6FDF02000078000DD8FB@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper , Keir Fraser , Feng Wu Subject: [Xen-devel] [PATCH v3 3/4] x86: use optimal NOPs to fill the SMEP/SMAP placeholders X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Alternatives patching code picks the most suitable NOPs for the running system, so simply use it to replace the pre-populated ones. Use an arbitrary, always available feature to key off from, but hide this behind the new X86_FEATURE_ALWAYS. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- v3: Re-base. v2: Introduce and use X86_FEATURE_ALWAYS. x86: use optimal NOPs to fill the SMEP/SMAP placeholders Alternatives patching code picks the most suitable NOPs for the running system, so simply use it to replace the pre-populated ones. Use an arbitrary, always available feature to key off from, but hide this behind the new X86_FEATURE_ALWAYS. Signed-off-by: Jan Beulich --- v3: Re-base. v2: Introduce and use X86_FEATURE_ALWAYS. --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -175,12 +175,7 @@ compat_bad_hypercall: ENTRY(compat_restore_all_guest) ASSERT_INTERRUPTS_DISABLED .Lcr4_orig: - ASM_NOP8 /* testb $3,UREGS_cs(%rsp) */ - ASM_NOP2 /* jpe .Lcr4_alt_end */ - ASM_NOP8 /* mov CPUINFO_cr4...(%rsp), %rax */ - ASM_NOP6 /* and $..., %rax */ - ASM_NOP8 /* mov %rax, CPUINFO_cr4...(%rsp) */ - ASM_NOP3 /* mov %rax, %cr4 */ + .skip (.Lcr4_alt_end - .Lcr4_alt) - (. - .Lcr4_orig), 0x90 .Lcr4_orig_end: .pushsection .altinstr_replacement, "ax" .Lcr4_alt: @@ -192,6 +187,7 @@ ENTRY(compat_restore_all_guest) mov %rax, %cr4 .Lcr4_alt_end: .section .altinstructions, "a" + altinstruction_entry .Lcr4_orig, .Lcr4_orig, X86_FEATURE_ALWAYS, 12, 0 altinstruction_entry .Lcr4_orig, .Lcr4_alt, X86_FEATURE_SMEP, \ (.Lcr4_orig_end - .Lcr4_orig), \ (.Lcr4_alt_end - .Lcr4_alt) --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -204,6 +204,7 @@ void ret_from_intr(void); 662: __ASM_##op; \ .popsection; \ .pushsection .altinstructions, "a"; \ + altinstruction_entry 661b, 661b, X86_FEATURE_ALWAYS, 3, 0; \ altinstruction_entry 661b, 662b, X86_FEATURE_SMAP, 3, 3; \ .popsection @@ -215,6 +216,7 @@ void ret_from_intr(void); .pushsection .altinstr_replacement, "ax"; \ 668: call cr4_pv32_restore; \ .section .altinstructions, "a"; \ + altinstruction_entry 667b, 667b, X86_FEATURE_ALWAYS, 5, 0; \ altinstruction_entry 667b, 668b, X86_FEATURE_SMEP, 5, 5; \ altinstruction_entry 667b, 668b, X86_FEATURE_SMAP, 5, 5; \ .popsection --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -162,6 +162,9 @@ #define cpufeat_bit(idx) ((idx) % 32) #define cpufeat_mask(idx) (_AC(1, U) << cpufeat_bit(idx)) +/* An alias of a feature we know is always going to be present. */ +#define X86_FEATURE_ALWAYS X86_FEATURE_LM + #if !defined(__ASSEMBLY__) && !defined(X86_FEATURES_ONLY) #include --- a/xen/arch/x86/x86_64/compat/entry.S +++ b/xen/arch/x86/x86_64/compat/entry.S @@ -175,12 +175,7 @@ compat_bad_hypercall: ENTRY(compat_restore_all_guest) ASSERT_INTERRUPTS_DISABLED .Lcr4_orig: - ASM_NOP8 /* testb $3,UREGS_cs(%rsp) */ - ASM_NOP2 /* jpe .Lcr4_alt_end */ - ASM_NOP8 /* mov CPUINFO_cr4...(%rsp), %rax */ - ASM_NOP6 /* and $..., %rax */ - ASM_NOP8 /* mov %rax, CPUINFO_cr4...(%rsp) */ - ASM_NOP3 /* mov %rax, %cr4 */ + .skip (.Lcr4_alt_end - .Lcr4_alt) - (. - .Lcr4_orig), 0x90 .Lcr4_orig_end: .pushsection .altinstr_replacement, "ax" .Lcr4_alt: @@ -192,6 +187,7 @@ ENTRY(compat_restore_all_guest) mov %rax, %cr4 .Lcr4_alt_end: .section .altinstructions, "a" + altinstruction_entry .Lcr4_orig, .Lcr4_orig, X86_FEATURE_ALWAYS, 12, 0 altinstruction_entry .Lcr4_orig, .Lcr4_alt, X86_FEATURE_SMEP, \ (.Lcr4_orig_end - .Lcr4_orig), \ (.Lcr4_alt_end - .Lcr4_alt) --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -204,6 +204,7 @@ void ret_from_intr(void); 662: __ASM_##op; \ .popsection; \ .pushsection .altinstructions, "a"; \ + altinstruction_entry 661b, 661b, X86_FEATURE_ALWAYS, 3, 0; \ altinstruction_entry 661b, 662b, X86_FEATURE_SMAP, 3, 3; \ .popsection @@ -215,6 +216,7 @@ void ret_from_intr(void); .pushsection .altinstr_replacement, "ax"; \ 668: call cr4_pv32_restore; \ .section .altinstructions, "a"; \ + altinstruction_entry 667b, 667b, X86_FEATURE_ALWAYS, 5, 0; \ altinstruction_entry 667b, 668b, X86_FEATURE_SMEP, 5, 5; \ altinstruction_entry 667b, 668b, X86_FEATURE_SMAP, 5, 5; \ .popsection --- a/xen/include/asm-x86/cpufeature.h +++ b/xen/include/asm-x86/cpufeature.h @@ -162,6 +162,9 @@ #define cpufeat_bit(idx) ((idx) % 32) #define cpufeat_mask(idx) (_AC(1, U) << cpufeat_bit(idx)) +/* An alias of a feature we know is always going to be present. */ +#define X86_FEATURE_ALWAYS X86_FEATURE_LM + #if !defined(__ASSEMBLY__) && !defined(X86_FEATURES_ONLY) #include