From patchwork Thu Mar 17 08:04:25 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 8607751 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 1FC03C0553 for ; Thu, 17 Mar 2016 08:07:05 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 32E07202AE for ; Thu, 17 Mar 2016 08:07:04 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 43E0F20173 for ; Thu, 17 Mar 2016 08:07:03 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1agSv1-0004Uc-EM; Thu, 17 Mar 2016 08:04:31 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1agSv0-0004UN-DJ for xen-devel@lists.xenproject.org; Thu, 17 Mar 2016 08:04:30 +0000 Received: from [85.158.139.211] by server-9.bemta-5.messagelabs.com id 5B/99-22144-D056AE65; Thu, 17 Mar 2016 08:04:29 +0000 X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-5.tower-206.messagelabs.com!1458201867!29592161!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.11; banners=-,-,- X-VirusChecked: Checked Received: (qmail 21110 invoked from network); 17 Mar 2016 08:04:28 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-5.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 17 Mar 2016 08:04:28 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Thu, 17 Mar 2016 02:04:26 -0600 Message-Id: <56EA731902000078000DD937@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.0 Date: Thu, 17 Mar 2016 02:04:25 -0600 From: "Jan Beulich" To: "xen-devel" References: <56D97AC102000078000D9537@prv-mh.provo.novell.com> <56E14FF502000078000DB232@prv-mh.provo.novell.com> <56E9A0DB02000078000DD54C@prv-mh.provo.novell.com> <56EA6FDF02000078000DD8FB@prv-mh.provo.novell.com> <56EA6FDF02000078000DD8FB@prv-mh.provo.novell.com> In-Reply-To: <56EA6FDF02000078000DD8FB@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper , Keir Fraser , Feng Wu Subject: [Xen-devel] [PATCH v3 4/4] x86: use 32-bit loads for 32-bit PV guest state reload X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This is slightly more efficient than loading 64-bit quantities. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper x86: use 32-bit loads for 32-bit PV guest state reload This is slightly more efficient than loading 64-bit quantities. Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -313,6 +313,13 @@ static always_inline void stac(void) 987: .endm +#define LOAD_ONE_REG(reg, compat) \ +.if !(compat); \ + movq UREGS_r##reg(%rsp),%r##reg; \ +.else; \ + movl UREGS_r##reg(%rsp),%e##reg; \ +.endif + /* * Reload registers not preserved by C code from frame. * @@ -326,16 +333,14 @@ static always_inline void stac(void) movq UREGS_r10(%rsp),%r10 movq UREGS_r9(%rsp),%r9 movq UREGS_r8(%rsp),%r8 -.if \ax - movq UREGS_rax(%rsp),%rax .endif -.elseif \ax - movl UREGS_rax(%rsp),%eax +.if \ax + LOAD_ONE_REG(ax, \compat) .endif - movq UREGS_rcx(%rsp),%rcx - movq UREGS_rdx(%rsp),%rdx - movq UREGS_rsi(%rsp),%rsi - movq UREGS_rdi(%rsp),%rdi + LOAD_ONE_REG(cx, \compat) + LOAD_ONE_REG(dx, \compat) + LOAD_ONE_REG(si, \compat) + LOAD_ONE_REG(di, \compat) .endm /* @@ -372,8 +377,9 @@ static always_inline void stac(void) .subsection 0 #endif .endif -987: movq UREGS_rbp(%rsp),%rbp - movq UREGS_rbx(%rsp),%rbx +987: + LOAD_ONE_REG(bp, \compat) + LOAD_ONE_REG(bx, \compat) subq $-(UREGS_error_code-UREGS_r15+\adj), %rsp .endm Reviewed-by: Konrad Rzeszutek Wilk --- a/xen/include/asm-x86/asm_defns.h +++ b/xen/include/asm-x86/asm_defns.h @@ -313,6 +313,13 @@ static always_inline void stac(void) 987: .endm +#define LOAD_ONE_REG(reg, compat) \ +.if !(compat); \ + movq UREGS_r##reg(%rsp),%r##reg; \ +.else; \ + movl UREGS_r##reg(%rsp),%e##reg; \ +.endif + /* * Reload registers not preserved by C code from frame. * @@ -326,16 +333,14 @@ static always_inline void stac(void) movq UREGS_r10(%rsp),%r10 movq UREGS_r9(%rsp),%r9 movq UREGS_r8(%rsp),%r8 -.if \ax - movq UREGS_rax(%rsp),%rax .endif -.elseif \ax - movl UREGS_rax(%rsp),%eax +.if \ax + LOAD_ONE_REG(ax, \compat) .endif - movq UREGS_rcx(%rsp),%rcx - movq UREGS_rdx(%rsp),%rdx - movq UREGS_rsi(%rsp),%rsi - movq UREGS_rdi(%rsp),%rdi + LOAD_ONE_REG(cx, \compat) + LOAD_ONE_REG(dx, \compat) + LOAD_ONE_REG(si, \compat) + LOAD_ONE_REG(di, \compat) .endm /* @@ -372,8 +377,9 @@ static always_inline void stac(void) .subsection 0 #endif .endif -987: movq UREGS_rbp(%rsp),%rbp - movq UREGS_rbx(%rsp),%rbx +987: + LOAD_ONE_REG(bp, \compat) + LOAD_ONE_REG(bx, \compat) subq $-(UREGS_error_code-UREGS_r15+\adj), %rsp .endm