From patchwork Tue Mar 22 12:54:24 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 8642071 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 658019F294 for ; Tue, 22 Mar 2016 12:56:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 890F82039C for ; Tue, 22 Mar 2016 12:56:49 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 7355B2025B for ; Tue, 22 Mar 2016 12:56:48 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1aiLpP-0004pk-NV; Tue, 22 Mar 2016 12:54:31 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1aiLpO-0004pZ-D0 for xen-devel@lists.xenproject.org; Tue, 22 Mar 2016 12:54:30 +0000 Received: from [193.109.254.147] by server-14.bemta-14.messagelabs.com id C5/FE-02987-58041F65; Tue, 22 Mar 2016 12:54:29 +0000 X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-9.tower-27.messagelabs.com!1458651266!33016886!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.11; banners=-,-,- X-VirusChecked: Checked Received: (qmail 15923 invoked from network); 22 Mar 2016 12:54:28 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-9.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 22 Mar 2016 12:54:28 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Tue, 22 Mar 2016 06:54:26 -0600 Message-Id: <56F14E9002000078000DF2A0@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.0 Date: Tue, 22 Mar 2016 06:54:24 -0600 From: "Jan Beulich" To: "xen-devel" Mime-Version: 1.0 Cc: Andrew Cooper , Keir Fraser Subject: [Xen-devel] [PATCH] x86: drop raw_write_cr4() again X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The bypassing of the memory cache is, namely in the context of the 32-bit PV SMEP/SMAP workaround series (as Andrew validly points out), making the overall correctness more difficult to verify. Hence go back to uniform writes. Signed-off-by: Jan Beulich x86: drop raw_write_cr4() again The bypassing of the memory cache is, namely in the context of the 32-bit PV SMEP/SMAP workaround series (as Andrew validly points out), making the overall correctness more difficult to verify. Hence go back to uniform writes. Signed-off-by: Jan Beulich --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -328,11 +328,6 @@ static inline unsigned long read_cr2(voi return cr2; } -static inline void raw_write_cr4(unsigned long val) -{ - asm volatile ( "mov %0,%%cr4" : : "r" (val) ); -} - static inline unsigned long read_cr4(void) { return get_cpu_info()->cr4; @@ -341,7 +336,7 @@ static inline unsigned long read_cr4(voi static inline void write_cr4(unsigned long val) { get_cpu_info()->cr4 = val; - raw_write_cr4(val); + asm volatile ( "mov %0,%%cr4" : : "r" (val) ); } /* Clear and set 'TS' bit respectively */ @@ -385,10 +380,10 @@ static inline unsigned int read_pkru(voi * so that X86_CR4_PKE is disabled on hypervisor. To use RDPKRU, CR4.PKE * gets temporarily enabled. */ - raw_write_cr4(cr4 | X86_CR4_PKE); + write_cr4(cr4 | X86_CR4_PKE); asm volatile (".byte 0x0f,0x01,0xee" : "=a" (pkru) : "c" (0) : "dx"); - raw_write_cr4(cr4); + write_cr4(cr4); return pkru; } Reviewed-by: Andrew Cooper --- a/xen/include/asm-x86/processor.h +++ b/xen/include/asm-x86/processor.h @@ -328,11 +328,6 @@ static inline unsigned long read_cr2(voi return cr2; } -static inline void raw_write_cr4(unsigned long val) -{ - asm volatile ( "mov %0,%%cr4" : : "r" (val) ); -} - static inline unsigned long read_cr4(void) { return get_cpu_info()->cr4; @@ -341,7 +336,7 @@ static inline unsigned long read_cr4(voi static inline void write_cr4(unsigned long val) { get_cpu_info()->cr4 = val; - raw_write_cr4(val); + asm volatile ( "mov %0,%%cr4" : : "r" (val) ); } /* Clear and set 'TS' bit respectively */ @@ -385,10 +380,10 @@ static inline unsigned int read_pkru(voi * so that X86_CR4_PKE is disabled on hypervisor. To use RDPKRU, CR4.PKE * gets temporarily enabled. */ - raw_write_cr4(cr4 | X86_CR4_PKE); + write_cr4(cr4 | X86_CR4_PKE); asm volatile (".byte 0x0f,0x01,0xee" : "=a" (pkru) : "c" (0) : "dx"); - raw_write_cr4(cr4); + write_cr4(cr4); return pkru; }