From patchwork Thu Apr 28 09:49:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 8967481 Return-Path: X-Original-To: patchwork-xen-devel@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 6267D9F1C1 for ; Thu, 28 Apr 2016 09:51:45 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 810A32022A for ; Thu, 28 Apr 2016 09:51:44 +0000 (UTC) Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 64DAE2011B for ; Thu, 28 Apr 2016 09:51:43 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1avia2-0005Dt-Uv; Thu, 28 Apr 2016 09:49:54 +0000 Received: from mail6.bemta14.messagelabs.com ([193.109.254.103]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1avia1-0005Di-Ie for xen-devel@lists.xenproject.org; Thu, 28 Apr 2016 09:49:53 +0000 Received: from [193.109.254.147] by server-1.bemta-14.messagelabs.com id DB/0F-02869-0CCD1275; Thu, 28 Apr 2016 09:49:52 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRWlGSWpSXmKPExsXS6fjDS/fAHcV wg7VfmC2+b5nM5MDocfjDFZYAxijWzLyk/IoE1oyuqVNYCp6rVPTt3MTawLhNuouRk0NIIE/i 6NbjzCA2r4CdRMOG62wgtoSAocS++avAbBYBVYk9y7pZQWw2AXWJtmfbgWwODhEBA4lzR5NAw swCURJ9y68ygdjCAhYS6zb+YIYYbydx69wldpByTgF7iUuTI0BMXgFBib87hCE67ST29Oxlns DIMwshMwtJBsLWknj46xYLhK0tsWzha2aQcmYBaYnl/zggwi4Sp783s6IqAbH9JRb/WM66gJF jFaNGcWpRWWqRrqGJXlJRZnpGSW5iZo6uIZCbm1pcnJiempOYVKyXnJ+7iREYqvUMDIw7GL+f 9jzEKMnBpCTK23VIMVyILyk/pTIjsTgjvqg0J7X4EKMMB4eSBG/obaCcYFFqempFWmYOMGpg0 hIcPEoivAm3gNK8xQWJucWZ6RCpU4yKUuK8WiB9AiCJjNI8uDZYpF5ilJUS5mVkYGAQ4ilILc rNLEGVf8UozsGoJMw7HWQKT2ZeCdz0V0CLmYAWC2wCW1ySiJCSamAM6F14/NIRGeFApVi2CvP wROb+ubcLV6gdmnPYXzuufNXDxgkXvwiqimTUGNS9WjFTOjU5jKEzc+OamX8upfC+DBdXU12V L7TkbhWHwXGpW1N2hqwu22DTenL7XjvfmdLesmoOGV9WcAbe53U75xygvHLdnmuL/UO+H7j45 rjdycVbeE9obDqnxFKckWioxVxUnAgA1576m88CAAA= X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-9.tower-27.messagelabs.com!1461836989!38280165!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests=UPPERCASE_25_50 X-StarScan-Received: X-StarScan-Version: 8.34; banners=-,-,- X-VirusChecked: Checked Received: (qmail 1052 invoked from network); 28 Apr 2016 09:49:51 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-9.tower-27.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 28 Apr 2016 09:49:51 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Thu, 28 Apr 2016 03:49:49 -0600 Message-Id: <5721F8E102000078000E6B17@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.0 Date: Thu, 28 Apr 2016 03:49:53 -0600 From: "Jan Beulich" To: "xen-devel" References: <5721F57C02000078000E6ACE@prv-mh.provo.novell.com> In-Reply-To: <5721F57C02000078000E6ACE@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper , Paul Durrant Subject: [Xen-devel] [PATCH 2/3] x86/vMSI-X: also snoop qword writes X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_MED, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP ... the high half of which may be a write to the Vector Control field. This gets things in sync again with msixtbl_write(). Signed-off-by: Jan Beulich x86/vMSI-X: also snoop qword writes ... the high half of which may be a write to the Vector Control field. This gets things in sync again with msixtbl_write(). Signed-off-by: Jan Beulich --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -336,6 +336,7 @@ out: static int msixtbl_range(struct vcpu *v, unsigned long addr) { const struct msi_desc *desc; + const ioreq_t *r; rcu_read_lock(&msixtbl_rcu_lock); desc = msixtbl_addr_to_desc(msixtbl_find_entry(v, addr), addr); @@ -344,17 +345,29 @@ static int msixtbl_range(struct vcpu *v, if ( desc ) return 1; - if ( (addr & (PCI_MSIX_ENTRY_SIZE - 1)) == - PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET ) + r = &v->arch.hvm_vcpu.hvm_io.io_req; + if ( r->state != STATE_IOREQ_READY || r->addr != addr ) + return 0; + ASSERT(r->type == IOREQ_TYPE_COPY); + if ( r->dir == IOREQ_WRITE ) { - const ioreq_t *r = &v->arch.hvm_vcpu.hvm_io.io_req; + if ( !r->data_is_ptr ) + { + unsigned int size = r->size; + uint64_t data = r->data; - if ( r->state != STATE_IOREQ_READY || r->addr != addr ) - return 0; - ASSERT(r->type == IOREQ_TYPE_COPY); - if ( r->dir == IOREQ_WRITE && r->size == 4 && !r->data_is_ptr - && !(r->data & PCI_MSIX_VECTOR_BITMASK) ) - v->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; + if ( size == 8 ) + { + BUILD_BUG_ON(!(PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET & 4)); + data >>= 32; + addr += size = 4; + } + if ( size == 4 && + ((addr & (PCI_MSIX_ENTRY_SIZE - 1)) == + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET) && + !(data & PCI_MSIX_VECTOR_BITMASK) ) + v->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; + } } return 0; Reviewed-by: Andrew Cooper Reviewed-by: Paul Durrant --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -336,6 +336,7 @@ out: static int msixtbl_range(struct vcpu *v, unsigned long addr) { const struct msi_desc *desc; + const ioreq_t *r; rcu_read_lock(&msixtbl_rcu_lock); desc = msixtbl_addr_to_desc(msixtbl_find_entry(v, addr), addr); @@ -344,17 +345,29 @@ static int msixtbl_range(struct vcpu *v, if ( desc ) return 1; - if ( (addr & (PCI_MSIX_ENTRY_SIZE - 1)) == - PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET ) + r = &v->arch.hvm_vcpu.hvm_io.io_req; + if ( r->state != STATE_IOREQ_READY || r->addr != addr ) + return 0; + ASSERT(r->type == IOREQ_TYPE_COPY); + if ( r->dir == IOREQ_WRITE ) { - const ioreq_t *r = &v->arch.hvm_vcpu.hvm_io.io_req; + if ( !r->data_is_ptr ) + { + unsigned int size = r->size; + uint64_t data = r->data; - if ( r->state != STATE_IOREQ_READY || r->addr != addr ) - return 0; - ASSERT(r->type == IOREQ_TYPE_COPY); - if ( r->dir == IOREQ_WRITE && r->size == 4 && !r->data_is_ptr - && !(r->data & PCI_MSIX_VECTOR_BITMASK) ) - v->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; + if ( size == 8 ) + { + BUILD_BUG_ON(!(PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET & 4)); + data >>= 32; + addr += size = 4; + } + if ( size == 4 && + ((addr & (PCI_MSIX_ENTRY_SIZE - 1)) == + PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET) && + !(data & PCI_MSIX_VECTOR_BITMASK) ) + v->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; + } } return 0;