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[v2] x86: refine debugging of SMEP/SMAP fix

Message ID 573B3A5902000078000EC2C1@prv-mh.provo.novell.com (mailing list archive)
State New, archived
Headers show

Commit Message

Jan Beulich May 17, 2016, 1:35 p.m. UTC 
Instead of just latching cr4_pv32_mask into %rdx, correct the found
wrong value in %cr4 (to avoid triggering another BUG). The value left
in %rdx should be sufficient for deducing cr4_pv32_mask from the
register dump.

Also there is one more place for XEN_CR4_PV32_BITS to be used.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Preserve cr4_pv32_mask value in a register.
x86: refine debugging of SMEP/SMAP fix

Instead of just latching cr4_pv32_mask into %rdx, correct the found
wrong value in %cr4 (to avoid triggering another BUG). The value left
in %rdx should be sufficient for deducing cr4_pv32_mask from the
register dump.

Also there is one more place for XEN_CR4_PV32_BITS to be used.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
---
v2: Preserve cr4_pv32_mask value in a register.

--- a/xen/arch/x86/x86_64/compat/entry.S
+++ b/xen/arch/x86/x86_64/compat/entry.S
@@ -182,7 +182,7 @@ ENTRY(compat_restore_all_guest)
         testb $3,UREGS_cs(%rsp)
         jpe   .Lcr4_alt_end
         mov   CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp), %rax
-        and   $~(X86_CR4_SMEP|X86_CR4_SMAP), %rax
+        and   $~XEN_CR4_PV32_BITS, %rax
         mov   %rax, CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp)
         mov   %rax, %cr4
 .Lcr4_alt_end:
@@ -220,6 +220,10 @@ ENTRY(cr4_pv32_restore)
         je    1f
         /* Cause cr4_pv32_mask to be visible in the BUG register dump. */
         mov   cr4_pv32_mask(%rip), %rdx
+        /* Avoid coming back here while handling the #UD we cause below. */
+        mov   %cr4, %rcx
+        or    %rdx, %rcx
+        mov   %rcx, %cr4
         BUG
 1:
 #endif

Comments

Andrew Cooper May 17, 2016, 1:37 p.m. UTC | #1 
On 17/05/16 14:35, Jan Beulich wrote:
> Instead of just latching cr4_pv32_mask into %rdx, correct the found
> wrong value in %cr4 (to avoid triggering another BUG). The value left
> in %rdx should be sufficient for deducing cr4_pv32_mask from the
> register dump.
>
> Also there is one more place for XEN_CR4_PV32_BITS to be used.
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>

Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Wei Liu May 17, 2016, 1:37 p.m. UTC | #2 
On Tue, May 17, 2016 at 02:37:16PM +0100, Andrew Cooper wrote:
> On 17/05/16 14:35, Jan Beulich wrote:
> > Instead of just latching cr4_pv32_mask into %rdx, correct the found
> > wrong value in %cr4 (to avoid triggering another BUG). The value left
> > in %rdx should be sufficient for deducing cr4_pv32_mask from the
> > register dump.
> >
> > Also there is one more place for XEN_CR4_PV32_BITS to be used.
> >
> > Signed-off-by: Jan Beulich <jbeulich@suse.com>
> 
> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>

Release-acked-by: Wei Liu <wei.liu2@citrix.com>
diff mbox

Patch

--- a/xen/arch/x86/x86_64/compat/entry.S
+++ b/xen/arch/x86/x86_64/compat/entry.S
@@ -182,7 +182,7 @@  ENTRY(compat_restore_all_guest)
         testb $3,UREGS_cs(%rsp)
         jpe   .Lcr4_alt_end
         mov   CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp), %rax
-        and   $~(X86_CR4_SMEP|X86_CR4_SMAP), %rax
+        and   $~XEN_CR4_PV32_BITS, %rax
         mov   %rax, CPUINFO_cr4-CPUINFO_guest_cpu_user_regs(%rsp)
         mov   %rax, %cr4
 .Lcr4_alt_end:
@@ -220,6 +220,10 @@  ENTRY(cr4_pv32_restore)
         je    1f
         /* Cause cr4_pv32_mask to be visible in the BUG register dump. */
         mov   cr4_pv32_mask(%rip), %rdx
+        /* Avoid coming back here while handling the #UD we cause below. */
+        mov   %cr4, %rcx
+        or    %rdx, %rcx
+        mov   %rcx, %cr4
         BUG
 1:
 #endif