From patchwork Wed Jun 8 12:54:47 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Beulich X-Patchwork-Id: 9164529 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 20DFA60467 for ; Wed, 8 Jun 2016 12:56:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 110B628179 for ; Wed, 8 Jun 2016 12:56:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 05B5F2823D; Wed, 8 Jun 2016 12:56:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.2 required=2.0 tests=BAYES_00, RCVD_IN_DNSWL_MED autolearn=ham version=3.3.1 Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 4DAE828179 for ; Wed, 8 Jun 2016 12:56:51 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bAd0Y-0007kh-AP; Wed, 08 Jun 2016 12:54:54 +0000 Received: from mail6.bemta5.messagelabs.com ([195.245.231.135]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bAd0W-0007kK-Ii for xen-devel@lists.xenproject.org; Wed, 08 Jun 2016 12:54:52 +0000 Received: from [85.158.139.211] by server-2.bemta-5.messagelabs.com id 66/C7-08449-B9518575; Wed, 08 Jun 2016 12:54:51 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFtrDIsWRWlGSWpSXmKPExsXS6fjDS3e2aES 4QetPVovvWyYzOTB6HP5whSWAMYo1My8pvyKBNWP93kvMBc89K15tXMnSwLjSsouRk0NIIE+i afZyVhCbV8BO4te3k2C2hIChxL75q9hAbBYBVYmzhw6xgNhsAuoSbc+2A9VwcIgIGEicO5oEE mYWiJLoW36VCcQWFgiReNxzhw1ivJ1E56l+ZhCbU8Be4mfrakaQVl4BQYm/O4QhWu0k3l3ewT 6BkWcWQmYWkgyErSXx8NctFghbW2LZwtfMIOXMAtISy/9xQISdJNYceciKqgTE9pV4tPAc0wJ GjlWM6sWpRWWpRbrGeklFmekZJbmJmTm6hgamermpxcWJ6ak5iUnFesn5uZsYgaHKAAQ7GPf+ czrEKMnBpCTKq+geHi7El5SfUpmRWJwRX1Sak1p8iFGGg0NJgtdIJCJcSLAoNT21Ii0zBxg1M GkJDh4lEV4ZkDRvcUFibnFmOkTqFKOilDjvH2GghABIIqM0D64NFqmXGGWlhHkZgQ4R4ilILc rNLEGVf8UozsGoJAwxhSczrwRu+iugxUxAi5cfCQdZXJKIkJJqYOww+mIvu2DnBne2lymWYj9 b7DhYQ+ZPdeKWu/vPzd74xaHrh71nubJor3FguBvu/UNf/sg/b0vjFf7asce7ZR8niTGrChlN WuAddDm8ovkPj6l2PntC9Pln+6S9g8X+zuz3Uiw7Fj7FTbRC/u3K6Xf7rSsXruv1an2jm53y+ LDA9HfK966xKbEUZyQaajEXFScCAHzgeB3PAgAA X-Env-Sender: JBeulich@suse.com X-Msg-Ref: server-10.tower-206.messagelabs.com!1465390489!26622133!1 X-Originating-IP: [137.65.248.74] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.46; banners=-,-,- X-VirusChecked: Checked Received: (qmail 44897 invoked from network); 8 Jun 2016 12:54:50 -0000 Received: from prv-mh.provo.novell.com (HELO prv-mh.provo.novell.com) (137.65.248.74) by server-10.tower-206.messagelabs.com with DHE-RSA-AES256-GCM-SHA384 encrypted SMTP; 8 Jun 2016 12:54:50 -0000 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Wed, 08 Jun 2016 06:54:48 -0600 Message-Id: <575831B702000078000F30AE@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.0 Date: Wed, 08 Jun 2016 06:54:47 -0600 From: "Jan Beulich" To: "xen-devel" References: <5758302D02000078000F3087@prv-mh.provo.novell.com> In-Reply-To: <5758302D02000078000F3087@prv-mh.provo.novell.com> Mime-Version: 1.0 Cc: Andrew Cooper , Paul Durrant Subject: [Xen-devel] [PATCH 4/4] x86/vMSI-X: use generic intercept handler in place of MMIO one X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This allows us to see the full ioreq without having to peek into state which is supposedly private to the emulation framework. Suggested-by: Paul Durrant Signed-off-by: Jan Beulich x86/vMSI-X: use generic intercept handler in place of MMIO one This allows us to see the full ioreq without having to peek into state which is supposedly private to the emulation framework. Suggested-by: Paul Durrant Signed-off-by: Jan Beulich --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -199,9 +199,8 @@ static struct msi_desc *msixtbl_addr_to_ return NULL; } -static int msixtbl_read( - struct vcpu *v, unsigned long address, - unsigned int len, unsigned long *pval) +static int msixtbl_read(const struct hvm_io_handler *handler, + uint64_t address, uint32_t len, uint64_t *pval) { unsigned long offset; struct msixtbl_entry *entry; @@ -213,7 +212,7 @@ static int msixtbl_read( rcu_read_lock(&msixtbl_rcu_lock); - entry = msixtbl_find_entry(v, address); + entry = msixtbl_find_entry(current, address); if ( !entry ) goto out; offset = address & (PCI_MSIX_ENTRY_SIZE - 1); @@ -333,23 +332,29 @@ out: return r; } -static int msixtbl_range(struct vcpu *v, unsigned long addr) +static int _msixtbl_write(const struct hvm_io_handler *handler, + uint64_t address, uint32_t len, uint64_t val) { + return msixtbl_write(current, address, len, val); +} + +static bool_t msixtbl_range(const struct hvm_io_handler *handler, + const ioreq_t *r) +{ + struct vcpu *curr = current; + unsigned long addr = r->addr; const struct msi_desc *desc; - const ioreq_t *r; + + ASSERT(r->type == IOREQ_TYPE_COPY); rcu_read_lock(&msixtbl_rcu_lock); - desc = msixtbl_addr_to_desc(msixtbl_find_entry(v, addr), addr); + desc = msixtbl_addr_to_desc(msixtbl_find_entry(curr, addr), addr); rcu_read_unlock(&msixtbl_rcu_lock); if ( desc ) return 1; - r = &v->arch.hvm_vcpu.hvm_io.io_req; - if ( r->state != STATE_IOREQ_READY || r->addr != addr ) - return 0; - ASSERT(r->type == IOREQ_TYPE_COPY); - if ( r->dir == IOREQ_WRITE ) + if ( r->state == STATE_IOREQ_READY && r->dir == IOREQ_WRITE ) { unsigned int size = r->size; @@ -368,8 +373,8 @@ static int msixtbl_range(struct vcpu *v, PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET) && !(data & PCI_MSIX_VECTOR_BITMASK) ) { - v->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; - v->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = 0; + curr->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; + curr->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = 0; } } else if ( (size == 4 || size == 8) && @@ -386,9 +391,9 @@ static int msixtbl_range(struct vcpu *v, BUILD_BUG_ON((PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET + 4) & (PCI_MSIX_ENTRY_SIZE - 1)); - v->arch.hvm_vcpu.hvm_io.msix_snoop_address = + curr->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr + size * r->count - 4; - v->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = + curr->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = r->data + size * r->count - 4; } } @@ -396,10 +401,10 @@ static int msixtbl_range(struct vcpu *v, return 0; } -static const struct hvm_mmio_ops msixtbl_mmio_ops = { - .check = msixtbl_range, +static const struct hvm_io_ops msixtbl_mmio_ops = { + .accept = msixtbl_range, .read = msixtbl_read, - .write = msixtbl_write + .write = _msixtbl_write }; static void add_msixtbl_entry(struct domain *d, @@ -544,13 +549,20 @@ found: void msixtbl_init(struct domain *d) { + struct hvm_io_handler *handler; + if ( !has_hvm_container_domain(d) || !has_vlapic(d) || d->arch.hvm_domain.msixtbl_list.next ) return; INIT_LIST_HEAD(&d->arch.hvm_domain.msixtbl_list); - register_mmio_handler(d, &msixtbl_mmio_ops); + handler = hvm_next_io_handler(d); + if ( handler ) + { + handler->type = IOREQ_TYPE_COPY; + handler->ops = &msixtbl_mmio_ops; + } } void msixtbl_pt_cleanup(struct domain *d) Reviewed-by: Paul Durrant Reviewed-by: Andrew Cooper , with two minor --- a/xen/arch/x86/hvm/vmsi.c +++ b/xen/arch/x86/hvm/vmsi.c @@ -199,9 +199,8 @@ static struct msi_desc *msixtbl_addr_to_ return NULL; } -static int msixtbl_read( - struct vcpu *v, unsigned long address, - unsigned int len, unsigned long *pval) +static int msixtbl_read(const struct hvm_io_handler *handler, + uint64_t address, uint32_t len, uint64_t *pval) { unsigned long offset; struct msixtbl_entry *entry; @@ -213,7 +212,7 @@ static int msixtbl_read( rcu_read_lock(&msixtbl_rcu_lock); - entry = msixtbl_find_entry(v, address); + entry = msixtbl_find_entry(current, address); if ( !entry ) goto out; offset = address & (PCI_MSIX_ENTRY_SIZE - 1); @@ -333,23 +332,29 @@ out: return r; } -static int msixtbl_range(struct vcpu *v, unsigned long addr) +static int _msixtbl_write(const struct hvm_io_handler *handler, + uint64_t address, uint32_t len, uint64_t val) { + return msixtbl_write(current, address, len, val); +} + +static bool_t msixtbl_range(const struct hvm_io_handler *handler, + const ioreq_t *r) +{ + struct vcpu *curr = current; + unsigned long addr = r->addr; const struct msi_desc *desc; - const ioreq_t *r; + + ASSERT(r->type == IOREQ_TYPE_COPY); rcu_read_lock(&msixtbl_rcu_lock); - desc = msixtbl_addr_to_desc(msixtbl_find_entry(v, addr), addr); + desc = msixtbl_addr_to_desc(msixtbl_find_entry(curr, addr), addr); rcu_read_unlock(&msixtbl_rcu_lock); if ( desc ) return 1; - r = &v->arch.hvm_vcpu.hvm_io.io_req; - if ( r->state != STATE_IOREQ_READY || r->addr != addr ) - return 0; - ASSERT(r->type == IOREQ_TYPE_COPY); - if ( r->dir == IOREQ_WRITE ) + if ( r->state == STATE_IOREQ_READY && r->dir == IOREQ_WRITE ) { unsigned int size = r->size; @@ -368,8 +373,8 @@ static int msixtbl_range(struct vcpu *v, PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET) && !(data & PCI_MSIX_VECTOR_BITMASK) ) { - v->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; - v->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = 0; + curr->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr; + curr->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = 0; } } else if ( (size == 4 || size == 8) && @@ -386,9 +391,9 @@ static int msixtbl_range(struct vcpu *v, BUILD_BUG_ON((PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET + 4) & (PCI_MSIX_ENTRY_SIZE - 1)); - v->arch.hvm_vcpu.hvm_io.msix_snoop_address = + curr->arch.hvm_vcpu.hvm_io.msix_snoop_address = addr + size * r->count - 4; - v->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = + curr->arch.hvm_vcpu.hvm_io.msix_snoop_gpa = r->data + size * r->count - 4; } } @@ -396,10 +401,10 @@ static int msixtbl_range(struct vcpu *v, return 0; } -static const struct hvm_mmio_ops msixtbl_mmio_ops = { - .check = msixtbl_range, +static const struct hvm_io_ops msixtbl_mmio_ops = { + .accept = msixtbl_range, .read = msixtbl_read, - .write = msixtbl_write + .write = _msixtbl_write }; static void add_msixtbl_entry(struct domain *d, @@ -544,13 +549,20 @@ found: void msixtbl_init(struct domain *d) { + struct hvm_io_handler *handler; + if ( !has_hvm_container_domain(d) || !has_vlapic(d) || d->arch.hvm_domain.msixtbl_list.next ) return; INIT_LIST_HEAD(&d->arch.hvm_domain.msixtbl_list); - register_mmio_handler(d, &msixtbl_mmio_ops); + handler = hvm_next_io_handler(d); + if ( handler ) + { + handler->type = IOREQ_TYPE_COPY; + handler->ops = &msixtbl_mmio_ops; + } } void msixtbl_pt_cleanup(struct domain *d)