@@ -9,7 +9,7 @@ riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
riscv-march-$(CONFIG_RISCV_64) := rv64
riscv-march-y += ima
riscv-march-$(CONFIG_RISCV_ISA_C) += c
-riscv-march-y += _zicsr_zifencei
+riscv-march-y += _zicsr_zifencei_zbb
riscv-generic-flags := $(riscv-abi-y) -march=$(subst $(space),,$(riscv-march-y))
@@ -25,13 +25,10 @@ $(eval $(1) := \
$(call as-insn,$(CC) $(riscv-generic-flags)_$(1),$(value $(1)-insn),_$(1)))
endef
-zbb-insn := "andn t0$(comma)t0$(comma)t0"
-$(call check-extension,zbb)
-
zihintpause-insn := "pause"
$(call check-extension,zihintpause)
-extensions := $(zbb) $(zihintpause)
+extensions := $(zihintpause)
extensions := $(subst $(space),,$(extensions))
According to riscv/booting.txt, it is expected that Zbb should be supported. Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com> --- Changes in v7: - new patch. --- xen/arch/riscv/arch.mk | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-)