| Message ID | 740c940c-f651-4d7d-954f-78b7d9a31a90@suse.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | x86/MCE: don't treat S3 resume the same as boot | expand |
On 29/05/2024 11:46 am, Jan Beulich wrote: > Checks for running on CPU0 are bogus; they identify S3 resume the same > as being the BSP while booting. Replace with the same check we use > elsewhere to properly limit things to just the BSP. > > Link: https://gitlab.com/xen-project/xen/-/jobs/6966698361 > Fixes: 19b6e9f9149f ("x86/MCE: optional build of AMD/Intel MCE code") > Signed-off-by: Jan Beulich <jbeulich@suse.com> > > --- a/xen/arch/x86/cpu/mcheck/mce_intel.c > +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c > @@ -767,7 +767,7 @@ static void intel_init_mca(struct cpuinf > lmce = intel_enable_lmce(); > > #define CAP(enabled, name) ((enabled) ? ", " name : "") > - if ( smp_processor_id() == 0 ) > + if ( c == &boot_cpu_data ) Look at the callers of this function. This doesn't help in the slightest, because mcheck_init() is extra-specially wonky. ~Andrew
--- a/xen/arch/x86/cpu/mcheck/mce_intel.c +++ b/xen/arch/x86/cpu/mcheck/mce_intel.c @@ -767,7 +767,7 @@ static void intel_init_mca(struct cpuinf lmce = intel_enable_lmce(); #define CAP(enabled, name) ((enabled) ? ", " name : "") - if ( smp_processor_id() == 0 ) + if ( c == &boot_cpu_data ) { dprintk(XENLOG_INFO, "MCA Capability: firstbank %d, extended MCE MSR %d%s%s%s%s\n",
Checks for running on CPU0 are bogus; they identify S3 resume the same as being the BSP while booting. Replace with the same check we use elsewhere to properly limit things to just the BSP. Link: https://gitlab.com/xen-project/xen/-/jobs/6966698361 Fixes: 19b6e9f9149f ("x86/MCE: optional build of AMD/Intel MCE code") Signed-off-by: Jan Beulich <jbeulich@suse.com>