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[2001:16b8:66b0:9f00:1e4b:d6ff:fef9:46e6]) by smtp.gmail.com with ESMTPSA id d25sm602206ejb.71.2019.06.28.12.43.02 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Fri, 28 Jun 2019 12:43:03 -0700 (PDT) From: Denis Obrezkov To: xen-devel@lists.xenproject.org Date: Fri, 28 Jun 2019 21:42:54 +0200 Message-Id: <8af4cfa481e24256b822f64efc6a0f45ae87cf65.1561750725.git.denisobrezkov@gmail.com> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Subject: [Xen-devel] [PATCH v2] xen/arm: Switch OMAP5 secondary cores into hyp mode X-BeenThere: xen-devel@lists.xenproject.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Cc: hy-gsoc@hy-research.com, sstabellini@kernel.org, andre.przywara@arm.com, tim@xen.org, Denis Obrezkov , drhunter95@gmail.com, julien.grall@arm.com Errors-To: xen-devel-bounces@lists.xenproject.org Sender: "Xen-devel" X-Virus-Scanned: ClamAV using ClamSMTP This function allows xen to bring secondary CPU cores into non-secure HYP mode. This is done by using a Secure Monitor call. Signed-off-by: Denis Obrezkov --- Changes in v2: - move code to platform specific file --- xen/arch/arm/platforms/omap5.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/platforms/omap5.c b/xen/arch/arm/platforms/omap5.c index aee24e4d28..79764a6cd6 100644 --- a/xen/arch/arm/platforms/omap5.c +++ b/xen/arch/arm/platforms/omap5.c @@ -23,6 +23,17 @@ #include #include +void omap5_init_secondary(void); +asm ( + ".text \n\t" + "omap5_init_secondary: \n\t" + " ldr r12, =0x102 \n\t" /* API_HYP_ENTRY */ + " adr r0, omap5_hyp \n\t" + " smc #0 \n\t" + "omap5_hyp: \n\t" + " b init_secondary \n\t" + ); + static uint16_t num_den[8][2] = { { 0, 0 }, /* not used */ { 26 * 64, 26 * 125 }, /* 12.0 Mhz */ @@ -128,8 +139,9 @@ static int __init omap5_smp_init(void) } printk("Set AuxCoreBoot1 to %"PRIpaddr" (%p)\n", - __pa(init_secondary), init_secondary); - writel(__pa(init_secondary), wugen_base + OMAP_AUX_CORE_BOOT_1_OFFSET); + __pa(omap5_init_secondary), omap5_init_secondary); + writel(__pa(omap5_init_secondary), + wugen_base + OMAP_AUX_CORE_BOOT_1_OFFSET); printk("Set AuxCoreBoot0 to 0x20\n"); writel(0x20, wugen_base + OMAP_AUX_CORE_BOOT_0_OFFSET);